forked from luck/tmp_suning_uos_patched
3c5f7e7b4a
On ARMv7 CPUs that cache first level page table entries (like the Cortex-A15), using a reserved ASID while changing the TTBR or flushing the TLB is unsafe. This is because the CPU may cache the first level entry as the result of a speculative memory access while the reserved ASID is assigned. After the process owning the page tables dies, the memory will be reallocated and may be written with junk values which can be interpreted as global, valid PTEs by the processor. This will result in the TLB being populated with bogus global entries. This patch avoids the use of a reserved context ID in the v7 switch_mm and ASID rollover code by temporarily using the swapper_pg_dir pointed at by TTBR1, which contains only global entries that are not tagged with ASIDs. Reviewed-by: Frank Rowand <frank.rowand@am.sony.com> Tested-by: Marc Zyngier <Marc.Zyngier@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> [catalin.marinas@arm.com: add LPAE support] Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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| .. | ||
| abort-ev4.S | ||
| abort-ev4t.S | ||
| abort-ev5t.S | ||
| abort-ev5tj.S | ||
| abort-ev6.S | ||
| abort-ev7.S | ||
| abort-lv4t.S | ||
| abort-macro.S | ||
| abort-nommu.S | ||
| alignment.c | ||
| cache-fa.S | ||
| cache-feroceon-l2.c | ||
| cache-l2x0.c | ||
| cache-tauros2.c | ||
| cache-v3.S | ||
| cache-v4.S | ||
| cache-v4wb.S | ||
| cache-v4wt.S | ||
| cache-v6.S | ||
| cache-v7.S | ||
| cache-xsc3l2.c | ||
| context.c | ||
| copypage-fa.c | ||
| copypage-feroceon.c | ||
| copypage-v3.c | ||
| copypage-v4mc.c | ||
| copypage-v4wb.c | ||
| copypage-v4wt.c | ||
| copypage-v6.c | ||
| copypage-xsc3.c | ||
| copypage-xscale.c | ||
| dma-mapping.c | ||
| extable.c | ||
| fault-armv.c | ||
| fault.c | ||
| fault.h | ||
| flush.c | ||
| fsr-2level.c | ||
| fsr-3level.c | ||
| highmem.c | ||
| idmap.c | ||
| init.c | ||
| iomap.c | ||
| ioremap.c | ||
| Kconfig | ||
| Makefile | ||
| mm.h | ||
| mmap.c | ||
| mmu.c | ||
| nommu.c | ||
| pabort-legacy.S | ||
| pabort-v6.S | ||
| pabort-v7.S | ||
| pgd.c | ||
| proc-arm6_7.S | ||
| proc-arm7tdmi.S | ||
| proc-arm9tdmi.S | ||
| proc-arm720.S | ||
| proc-arm740.S | ||
| proc-arm920.S | ||
| proc-arm922.S | ||
| proc-arm925.S | ||
| proc-arm926.S | ||
| proc-arm940.S | ||
| proc-arm946.S | ||
| proc-arm1020.S | ||
| proc-arm1020e.S | ||
| proc-arm1022.S | ||
| proc-arm1026.S | ||
| proc-fa526.S | ||
| proc-feroceon.S | ||
| proc-macros.S | ||
| proc-mohawk.S | ||
| proc-sa110.S | ||
| proc-sa1100.S | ||
| proc-syms.c | ||
| proc-v6.S | ||
| proc-v7-2level.S | ||
| proc-v7-3level.S | ||
| proc-v7.S | ||
| proc-xsc3.S | ||
| proc-xscale.S | ||
| tlb-fa.S | ||
| tlb-v3.S | ||
| tlb-v4.S | ||
| tlb-v4wb.S | ||
| tlb-v4wbi.S | ||
| tlb-v6.S | ||
| tlb-v7.S | ||
| vmregion.c | ||
| vmregion.h | ||