Venkatesh Pallipadi 30037f66ce [PATCH] x86: when L3 is present show its size in /proc/cpuinfo ... The code that prints the cache size assumes that L3 always lives in chipset and is shared across CPUs. Which is not really true. I think all the cachesizes reported by cpuid are in the processor itself. The attached patch changes the code to reflect that. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>		2005-10-30 17:37:12 -08:00
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cpufreq
mcheck	[PATCH] x86: bug fix in P6 Machine check initialization	2005-10-30 17:37:12 -08:00
mtrr
amd.c
centaur.c
changelog
common.c	[PATCH] x86: add an accessor function for getting the per-CPU gdt	2005-10-30 17:37:12 -08:00
cpu.h
cyrix.c
intel_cacheinfo.c	[PATCH] x86: when L3 is present show its size in /proc/cpuinfo	2005-10-30 17:37:12 -08:00
intel.c
Makefile
nexgen.c
proc.c
rise.c
transmeta.c
umc.c