forked from luck/tmp_suning_uos_patched
4c75a6f441
This patch adds new dcr_map/dcr_read/dcr_write accessors for DCRs that can be used by drivers to transparently address either native DCRs or memory mapped DCRs. The implementation for memory mapped DCRs is done after the binding being currently worked on for SLOF and the Axon chipset. This patch enables it for the cell native platform Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
40 lines
858 B
ArmAsm
40 lines
858 B
ArmAsm
/*
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* "Indirect" DCR access
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*
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* Copyright (c) 2004 Eugene Surovegin <ebs@ebshome.net>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <asm/ppc_asm.h>
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#include <asm/processor.h>
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#define DCR_ACCESS_PROLOG(table) \
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rlwinm r3,r3,4,18,27; \
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lis r5,table@h; \
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ori r5,r5,table@l; \
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add r3,r3,r5; \
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mtctr r3; \
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bctr
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_GLOBAL(__mfdcr)
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DCR_ACCESS_PROLOG(__mfdcr_table)
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_GLOBAL(__mtdcr)
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DCR_ACCESS_PROLOG(__mtdcr_table)
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__mfdcr_table:
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mfdcr r3,0; blr
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__mtdcr_table:
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mtdcr 0,r4; blr
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dcr = 1
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.rept 1023
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mfdcr r3,dcr; blr
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mtdcr dcr,r4; blr
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dcr = dcr + 1
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.endr
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