kernel_optimize_test/arch
Jeffrey Hugo 73bf070408 PCI: hv: Fix hv_arch_irq_unmask() for multi-MSI
commit 455880dfe292a2bdd3b4ad6a107299fce610e64b upstream.

In the multi-MSI case, hv_arch_irq_unmask() will only operate on the first
MSI of the N allocated.  This is because only the first msi_desc is cached
and it is shared by all the MSIs of the multi-MSI block.  This means that
hv_arch_irq_unmask() gets the correct address, but the wrong data (always
0).

This can break MSIs.

Lets assume MSI0 is vector 34 on CPU0, and MSI1 is vector 33 on CPU0.

hv_arch_irq_unmask() is called on MSI0.  It uses a hypercall to configure
the MSI address and data (0) to vector 34 of CPU0.  This is correct.  Then
hv_arch_irq_unmask is called on MSI1.  It uses another hypercall to
configure the MSI address and data (0) to vector 33 of CPU0.  This is
wrong, and results in both MSI0 and MSI1 being routed to vector 33.  Linux
will observe extra instances of MSI1 and no instances of MSI0 despite the
endpoint device behaving correctly.

For the multi-MSI case, we need unique address and data info for each MSI,
but the cached msi_desc does not provide that.  However, that information
can be gotten from the int_desc cached in the chip_data by
compose_msi_msg().  Fix the multi-MSI case to use that cached information
instead.  Since hv_set_msi_entry_from_desc() is no longer applicable,
remove it.

5.10 backport - removed unused hv_set_msi_entry_from_desc function from
mshyperv.h instead of pci-hyperv.c. msi_entry.address/data.as_uint32
changed to direct reference (as they are u32's, just sans union).

Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Reviewed-by: Michael Kelley <mikelley@microsoft.com>
Link: https://lore.kernel.org/r/1651068453-29588-1-git-send-email-quic_jhugo@quicinc.com
Signed-off-by: Wei Liu <wei.liu@kernel.org>
Signed-off-by: Carl Vanderlip <quic_carlv@quicinc.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-07-29 17:19:09 +02:00
..
alpha alpha: define get_cycles macro for arch-override 2022-05-30 09:33:40 +02:00
arc
arm ARM: dts: stm32: use the correct clock source for CEC on stm32mp151 2022-07-21 21:20:17 +02:00
arm64 arm64: dts: qcom: msm8992-*: Fix vdd_lvs1_2-supply typo 2022-07-12 16:32:20 +02:00
c6x
csky csky: patch_text: Fixup last cpu should be master 2022-06-09 10:21:26 +02:00
h8300
hexagon
ia64 ia64: define get_cycles macro for arch-override 2022-05-30 09:33:40 +02:00
m68k Revert "m68knommu: only set CONFIG_ISA_DMA_API for ColdFire sub-arch" 2022-07-29 17:19:09 +02:00
microblaze
mips MIPS: Remove repetitive increase irq_err_count 2022-06-29 08:59:48 +02:00
nds32
nios2 nios2: use fallback for random_get_entropy() instead of zero 2022-05-30 09:33:41 +02:00
openrisc openrisc: start CPU timer early in boot 2022-06-09 10:20:55 +02:00
parisc parisc: Enable ARCH_HAS_STRICT_MODULE_RWX 2022-06-29 08:59:53 +02:00
powerpc powerpc/powernv: delay rng platform device creation until later in boot 2022-07-12 16:32:19 +02:00
riscv riscv: add as-options for modules with assembly compontents 2022-07-29 17:19:06 +02:00
s390 s390: remove unneeded 'select BUILD_BIN2C' 2022-07-07 17:52:18 +02:00
sh sh: convert nommu io{re,un}map() to static inline functions 2022-07-21 21:20:02 +02:00
sparc sparc: use fallback for random_get_entropy() instead of zero 2022-05-30 09:33:42 +02:00
um um: Add missing apply_returns() 2022-07-25 11:26:55 +02:00
x86 PCI: hv: Fix hv_arch_irq_unmask() for multi-MSI 2022-07-29 17:19:09 +02:00
xtensa xtensa: Fix refcount leak bug in time.c 2022-06-29 08:59:53 +02:00
.gitignore
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