forked from luck/tmp_suning_uos_patched
e4ac58afdf
Saves like 1,600 lines of code, is way easier to debug, compilers frequently do a better job than the cut and paste type of handlers many boards had. And finally having all the stuff done in a single place also means alot of bug potencial for the MT ASE is gone. The only surviving handler in assembler is the DECstation one; I hope Maciej will rewrite it. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
20 lines
1.0 KiB
Plaintext
20 lines
1.0 KiB
Plaintext
1. Need to figure out why PCI writes to the IOC3 hang, and if it is okay
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not to write to the IOC3 ever.
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2. Need to figure out RRB allocation in bridge_startup().
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3. Need to figure out why address swaizzling is needed in inw/outw for
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Qlogic scsi controllers.
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4. Need to integrate ip27-klconfig.c:find_lboard and
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ip27-init.c:find_lbaord_real. DONE
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5. Is it okay to set calias space on all nodes as 0, instead of 8k as
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in irix?
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6. Investigate why things do not work without the setup_test() call
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being invoked on all nodes in ip27-memory.c.
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8. Too many do_page_faults invoked - investigate.
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9. start_thread must turn off UX64 ... and define tlb_refill_debug.
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10. Need a bad pmd table, bad pte table. __bad_pmd_table/__bad_pagetable
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does not agree with pgd_bad/pmd_bad.
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11. All intrs (ip27_do_irq handlers) are targetted at cpu A on the node.
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This might need to change later. Only the timer intr is set up to be
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received on both Cpu A and B. (ip27_do_irq()/bridge_startup())
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13. Cache flushing (specially the SMP version) has to be investigated.
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