Magnus Damm 51da64264b sh: intc - add single bitmap register support ... This patch adds single bitmap register support to intc. The current code only handles 16 and 32 bit registers where a set bit means interrupt enabled, but this is easy to extend in the future. The INTC_IRQ() macro is also added to provide a way to hook in interrupt controllers for FPGAs in boards or companion chips. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>		2007-09-21 11:57:47 +09:00
..
irq	sh: intc - add single bitmap register support	2007-09-21 11:57:47 +09:00
sh2
sh2a
sh3	sh: intc - remove redundant irq code for shmin	2007-09-21 11:57:47 +09:00
sh4	sh: intc - remove redundant irq code for sh03, snapgear and titan	2007-09-21 11:57:47 +09:00
sh4a	sh: Initial multiple-node support for SH-X3.	2007-09-21 11:57:47 +09:00
adc.c
clock.c
init.c	sh: Support explicit L1 cache disabling.	2007-09-21 11:57:46 +09:00
Makefile
ubc.S