kernel_optimize_test/drivers/mmc
Daniel Mack 4a31f2eff3 ARM: mx3: Fix a race condition in mxcmmc
From cefcdab08d1c9636c4a7290bc2bbe937d051bce4 Mon Sep 17 00:00:00 2001
From: Volker Ernst <volker.ernst@txtr.com>
Date: Mon, 26 Apr 2010 22:51:07 +0200
Subject: [PATCH] ARM: mx3: Fix a race condition in mxcmmc

This fixes a race condition regarding interrupt bits in the SDHC
controller driver code.

In case of PIO-transfer it does not clear SDHC-status bit#11/12
in the INT-handler anymore. INT-handler might be called during
an ongoing PIO-data-transfer (with some other INT-flag set) and
PIO-transfer depends on these bits being set to detect the end
of the data-transfer. This also means that at the end of PIO-
transfer that PIO-software has to clear these bits itself.

However in case of DMA-transfer these bits have to be cleared
in the INT-handler, because they are used to generate INTs then.

Works solid, no more problems here, can transfer big files.

Signed-off-by: Volker Ernst <volker.ernst@txtr.com>
Acked-by: Daniel Mack <daniel@caiaq.de>
Cc: Andy Green <andy@warmcat.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2010-05-17 11:44:13 +02:00
..
card include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h 2010-03-30 22:02:32 +09:00
core ARM: MXC: mxcmmc: work around a bug in the SDHC busy line handling 2010-04-14 09:18:07 +02:00
host ARM: mx3: Fix a race condition in mxcmmc 2010-05-17 11:44:13 +02:00
Kconfig
Makefile