forked from luck/tmp_suning_uos_patched
4be505d4fc
The ARM GIC binding defines a few custom cells and flags for its IRQ specifier. Provide names for those. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Rob Herring <rob.herring@calxeda.com>
23 lines
490 B
C
23 lines
490 B
C
/*
|
|
* This header provides constants for the ARM GIC.
|
|
*/
|
|
|
|
#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
|
|
#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ARM_GIC_H
|
|
|
|
#include <dt-bindings/interrupt-controller/irq.h>
|
|
|
|
/* interrupt specific cell 0 */
|
|
|
|
#define GIC_SPI 0
|
|
#define GIC_PPI 1
|
|
|
|
/*
|
|
* Interrupt specifier cell 2.
|
|
* The flaggs in irq.h are valid, plus those below.
|
|
*/
|
|
#define GIC_CPU_MASK_RAW(x) ((x) << 8)
|
|
#define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1)
|
|
|
|
#endif
|