forked from luck/tmp_suning_uos_patched
5c93316c8c
prom_putchar() is used centrally in early printk infrastructure therefore
at least MIPS should agree on the function return type.
[paul.burton@mips.com:
- Include linux/types.h in asm/setup.h to gain the bool typedef before
we start include asm/setup.h elsewhere.
- Include asm/setup.h in all files that use or define prom_putchar().
- Also standardise on signed rather than unsigned char argument.]
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/19842/
Cc: linux-mips@linux-mips.org
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: Jonas Gorski <jonas.gorski@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Kate Stewart <kstewart@linuxfoundation.org>
Cc: Philippe Ombredanne <pombredanne@nexb.com>
91 lines
2.0 KiB
C
91 lines
2.0 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
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*/
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#include <linux/io.h>
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#include <linux/serial_reg.h>
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#include <asm/addrspace.h>
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#include <asm/setup.h>
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#ifdef CONFIG_SOC_RT288X
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#define EARLY_UART_BASE 0x300c00
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#define CHIPID_BASE 0x300004
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#elif defined(CONFIG_SOC_MT7621)
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#define EARLY_UART_BASE 0x1E000c00
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#define CHIPID_BASE 0x1E000004
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#else
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#define EARLY_UART_BASE 0x10000c00
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#define CHIPID_BASE 0x10000004
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#endif
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#define MT7628_CHIP_NAME1 0x20203832
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#define UART_REG_TX 0x04
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#define UART_REG_LCR 0x0c
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#define UART_REG_LSR 0x14
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#define UART_REG_LSR_RT2880 0x1c
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static __iomem void *uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE);
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static __iomem void *chipid_membase = (__iomem void *) KSEG1ADDR(CHIPID_BASE);
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static int init_complete;
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static inline void uart_w32(u32 val, unsigned reg)
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{
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__raw_writel(val, uart_membase + reg);
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}
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static inline u32 uart_r32(unsigned reg)
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{
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return __raw_readl(uart_membase + reg);
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}
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static inline int soc_is_mt7628(void)
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{
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return IS_ENABLED(CONFIG_SOC_MT7620) &&
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(__raw_readl(chipid_membase) == MT7628_CHIP_NAME1);
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}
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static void find_uart_base(void)
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{
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int i;
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if (!soc_is_mt7628())
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return;
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for (i = 0; i < 3; i++) {
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u32 reg = uart_r32(UART_REG_LCR + (0x100 * i));
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if (!reg)
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continue;
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uart_membase = (__iomem void *) KSEG1ADDR(EARLY_UART_BASE +
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(0x100 * i));
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break;
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}
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}
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void prom_putchar(char ch)
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{
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if (!init_complete) {
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find_uart_base();
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init_complete = 1;
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}
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if (IS_ENABLED(CONFIG_SOC_MT7621) || soc_is_mt7628()) {
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uart_w32((unsigned char)ch, UART_TX);
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while ((uart_r32(UART_REG_LSR) & UART_LSR_THRE) == 0)
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;
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} else {
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while ((uart_r32(UART_REG_LSR_RT2880) & UART_LSR_THRE) == 0)
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;
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uart_w32((unsigned char)ch, UART_REG_TX);
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while ((uart_r32(UART_REG_LSR_RT2880) & UART_LSR_THRE) == 0)
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;
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}
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}
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