kernel_optimize_test/include/uapi/drm
Swati Sharma 50bf5d7d59 drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
The following pixel formats are packed format that follows 4:2:2
chroma sampling. For memory represenation each component is
allocated 16 bits each. Thus each pixel occupies 32bit.

Y210:	For each component, valid data occupies MSB 10 bits.
	LSB 6 bits are filled with zeroes.
Y212:	For each component, valid data occupies MSB 12 bits.
	LSB 4 bits are filled with zeroes.
Y216:	For each component valid data occupies 16 bits,
	doesn't require any padding bits.

First 16 bits stores the Y value and the next 16 bits stores one
of the chroma samples alternatively. The first luma sample will
be accompanied by first U sample and second luma sample is
accompanied by the first V sample.

The following pixel formats are packed format that follows 4:4:4
chroma sampling. Channels are arranged in the order UYVA in
increasing memory order.

Y410:	Each color component occupies 10 bits and X component
	takes 2 bits, thus each pixel occupies 32 bits.
Y412:   Each color component is 16 bits where valid data
	occupies MSB 12 bits. LSB 4 bits are filled with zeroes.
	Thus, each pixel occupies 64 bits.
Y416:   Each color component occupies 16 bits for valid data,
	doesn't require any padding bits. Thus, each pixel
	occupies 64 bits.

v3: fixed missing tab for XYUV8888 (JP)

Signed-off-by: Swati Sharma <swati2.sharma@intel.com>
Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1551700595-21481-5-git-send-email-swati2.sharma@intel.com
2019-03-05 12:47:54 +01:00
..
amdgpu_drm.h drm/amdgpu: Add command to override the context priority. 2019-02-15 11:15:43 -05:00
armada_drm.h
drm_fourcc.h drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc 2019-03-05 12:47:54 +01:00
drm_mode.h drm: Add a new plane property to send damage during plane update 2018-12-05 10:00:35 +01:00
drm_sarea.h
drm.h drm/syncobj: disable the timeline UAPI for now v2 2018-11-08 11:31:34 +01:00
etnaviv_drm.h
exynos_drm.h drm/exynos: ipp: Add IPP v2 framework 2018-05-10 08:48:53 +09:00
i810_drm.h
i915_drm.h drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11 only) 2019-02-05 11:32:03 +00:00
mga_drm.h
msm_drm.h drm/msm: add uapi to get/set debug name 2018-12-11 13:07:05 -05:00
nouveau_drm.h drm/nouveau/svm: new ioctl to migrate process memory to GPU memory 2019-02-20 09:00:03 +10:00
omap_drm.h
qxl_drm.h
r128_drm.h
radeon_drm.h
savage_drm.h
sis_drm.h
tegra_drm.h drm/tegra: Add kerneldoc for UAPI 2018-05-19 00:21:20 +02:00
v3d_drm.h drm/v3d: Document cache flushing ABI. 2018-12-07 10:55:48 -08:00
vc4_drm.h drm/vc4: Add a pad field to align drm_vc4_submit_cl to 64 bits. 2018-05-03 15:20:09 -07:00
vgem_drm.h
via_drm.h
virtgpu_drm.h drm/virtio: add in/out fence support for explicit synchronization 2018-11-14 14:21:02 +01:00
vmwgfx_drm.h drm/vmwgfx: Expose SM4_1 param to user space 2018-07-06 20:16:09 +02:00