forked from luck/tmp_suning_uos_patched
9952f6918d
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 228 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190528171438.107155473@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
29 lines
898 B
C
29 lines
898 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved.
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*/
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#ifndef _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H
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#define _DT_BINDINGS_POWER_TEGRA186_POWERGATE_H
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#define TEGRA186_POWER_DOMAIN_AUD 0
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#define TEGRA186_POWER_DOMAIN_DFD 1
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#define TEGRA186_POWER_DOMAIN_DISP 2
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#define TEGRA186_POWER_DOMAIN_DISPB 3
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#define TEGRA186_POWER_DOMAIN_DISPC 4
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#define TEGRA186_POWER_DOMAIN_ISPA 5
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#define TEGRA186_POWER_DOMAIN_NVDEC 6
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#define TEGRA186_POWER_DOMAIN_NVJPG 7
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#define TEGRA186_POWER_DOMAIN_MPE 8
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#define TEGRA186_POWER_DOMAIN_PCX 9
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#define TEGRA186_POWER_DOMAIN_SAX 10
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#define TEGRA186_POWER_DOMAIN_VE 11
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#define TEGRA186_POWER_DOMAIN_VIC 12
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#define TEGRA186_POWER_DOMAIN_XUSBA 13
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#define TEGRA186_POWER_DOMAIN_XUSBB 14
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#define TEGRA186_POWER_DOMAIN_XUSBC 15
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#define TEGRA186_POWER_DOMAIN_GPU 43
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#define TEGRA186_POWER_DOMAIN_MAX 44
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#endif
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