forked from luck/tmp_suning_uos_patched
eadefeff9c
The internal devices of the MX3 Processor have to be mapped MT_DEVICE_NONSHARED devices, otherwise cache corruptions occur. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
43 lines
1.0 KiB
C
43 lines
1.0 KiB
C
/*
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* Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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*/
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_MXC_IO_H__
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#define __ASM_ARCH_MXC_IO_H__
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/* Allow IO space to be anywhere in the memory */
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#define IO_SPACE_LIMIT 0xffffffff
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#ifdef CONFIG_ARCH_MX3
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#define __arch_ioremap __mx3_ioremap
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#define __arch_iounmap __iounmap
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static inline void __iomem *
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__mx3_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
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{
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if (mtype == MT_DEVICE) {
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/* Access all peripherals below 0x80000000 as nonshared device
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* but leave l2cc alone.
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*/
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if ((phys_addr < 0x80000000) && ((phys_addr < L2CC_BASE_ADDR) ||
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(phys_addr >= L2CC_BASE_ADDR + L2CC_SIZE)))
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mtype = MT_DEVICE_NONSHARED;
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}
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return __arm_ioremap(phys_addr, size, mtype);
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}
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#endif
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/* io address mapping macro */
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#define __io(a) ((void __iomem *)(a))
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#define __mem_pci(a) (a)
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#endif
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