forked from luck/tmp_suning_uos_patched
b4e7de0f35
The 601 processor will generate an alignment exception for accesses which cross a page boundary. In the boot wrapper code, OF is still handling all exceptions, and it doesn't have an alignment exception handler that emulates the instruction and continues. This changes the memcpy and memmove routines in the boot wrapper to avoid doing unaligned accesses. If the source and destination are misaligned with respect to each other, we just copy one byte at a time. Signed-off-by: Paul Mackerras <paulus@samba.org>
231 lines
3.3 KiB
ArmAsm
231 lines
3.3 KiB
ArmAsm
/*
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* Copyright (C) Paul Mackerras 1997.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* NOTE: this code runs in 32 bit mode and is packaged as ELF32.
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*/
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#include "ppc_asm.h"
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.text
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.globl strcpy
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strcpy:
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addi r5,r3,-1
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addi r4,r4,-1
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1: lbzu r0,1(r4)
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cmpwi 0,r0,0
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stbu r0,1(r5)
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bne 1b
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blr
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.globl strncpy
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strncpy:
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cmpwi 0,r5,0
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beqlr
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mtctr r5
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addi r6,r3,-1
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addi r4,r4,-1
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1: lbzu r0,1(r4)
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cmpwi 0,r0,0
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stbu r0,1(r6)
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bdnzf 2,1b /* dec ctr, branch if ctr != 0 && !cr0.eq */
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blr
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.globl strcat
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strcat:
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addi r5,r3,-1
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addi r4,r4,-1
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1: lbzu r0,1(r5)
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cmpwi 0,r0,0
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bne 1b
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addi r5,r5,-1
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1: lbzu r0,1(r4)
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cmpwi 0,r0,0
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stbu r0,1(r5)
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bne 1b
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blr
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.globl strcmp
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strcmp:
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addi r5,r3,-1
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addi r4,r4,-1
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1: lbzu r3,1(r5)
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cmpwi 1,r3,0
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lbzu r0,1(r4)
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subf. r3,r0,r3
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beqlr 1
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beq 1b
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blr
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.globl strlen
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strlen:
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addi r4,r3,-1
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1: lbzu r0,1(r4)
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cmpwi 0,r0,0
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bne 1b
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subf r3,r3,r4
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blr
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.globl memset
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memset:
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rlwimi r4,r4,8,16,23
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rlwimi r4,r4,16,0,15
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addi r6,r3,-4
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cmplwi 0,r5,4
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blt 7f
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stwu r4,4(r6)
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beqlr
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andi. r0,r6,3
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add r5,r0,r5
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subf r6,r0,r6
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rlwinm r0,r5,32-2,2,31
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mtctr r0
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bdz 6f
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1: stwu r4,4(r6)
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bdnz 1b
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6: andi. r5,r5,3
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7: cmpwi 0,r5,0
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beqlr
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mtctr r5
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addi r6,r6,3
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8: stbu r4,1(r6)
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bdnz 8b
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blr
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.globl memmove
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memmove:
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cmplw 0,r3,r4
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bgt backwards_memcpy
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/* fall through */
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.globl memcpy
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memcpy:
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rlwinm. r7,r5,32-3,3,31 /* r7 = r5 >> 3 */
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addi r6,r3,-4
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addi r4,r4,-4
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beq 3f /* if less than 8 bytes to do */
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andi. r0,r6,3 /* get dest word aligned */
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mtctr r7
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bne 5f
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andi. r0,r4,3 /* check src word aligned too */
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bne 3f
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1: lwz r7,4(r4)
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lwzu r8,8(r4)
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stw r7,4(r6)
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stwu r8,8(r6)
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bdnz 1b
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andi. r5,r5,7
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2: cmplwi 0,r5,4
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blt 3f
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lwzu r0,4(r4)
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addi r5,r5,-4
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stwu r0,4(r6)
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3: cmpwi 0,r5,0
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beqlr
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mtctr r5
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addi r4,r4,3
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addi r6,r6,3
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4: lbzu r0,1(r4)
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stbu r0,1(r6)
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bdnz 4b
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blr
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5: subfic r0,r0,4
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cmpw cr1,r0,r5
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add r7,r0,r4
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andi. r7,r7,3 /* will source be word-aligned too? */
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ble cr1,3b
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bne 3b /* do byte-by-byte if not */
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mtctr r0
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6: lbz r7,4(r4)
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addi r4,r4,1
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stb r7,4(r6)
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addi r6,r6,1
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bdnz 6b
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subf r5,r0,r5
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rlwinm. r7,r5,32-3,3,31
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beq 2b
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mtctr r7
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b 1b
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.globl backwards_memcpy
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backwards_memcpy:
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rlwinm. r7,r5,32-3,3,31 /* r7 = r5 >> 3 */
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add r6,r3,r5
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add r4,r4,r5
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beq 3f
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andi. r0,r6,3
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mtctr r7
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bne 5f
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andi. r0,r4,3
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bne 3f
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1: lwz r7,-4(r4)
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lwzu r8,-8(r4)
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stw r7,-4(r6)
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stwu r8,-8(r6)
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bdnz 1b
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andi. r5,r5,7
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2: cmplwi 0,r5,4
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blt 3f
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lwzu r0,-4(r4)
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subi r5,r5,4
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stwu r0,-4(r6)
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3: cmpwi 0,r5,0
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beqlr
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mtctr r5
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4: lbzu r0,-1(r4)
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stbu r0,-1(r6)
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bdnz 4b
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blr
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5: cmpw cr1,r0,r5
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subf r7,r0,r4
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andi. r7,r7,3
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ble cr1,3b
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bne 3b
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mtctr r0
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6: lbzu r7,-1(r4)
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stbu r7,-1(r6)
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bdnz 6b
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subf r5,r0,r5
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rlwinm. r7,r5,32-3,3,31
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beq 2b
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mtctr r7
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b 1b
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.globl memcmp
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memcmp:
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cmpwi 0,r5,0
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blelr
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mtctr r5
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addi r6,r3,-1
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addi r4,r4,-1
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1: lbzu r3,1(r6)
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lbzu r0,1(r4)
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subf. r3,r0,r3
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bdnzt 2,1b
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blr
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/*
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* Flush the dcache and invalidate the icache for a range of addresses.
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*
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* flush_cache(addr, len)
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*/
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.global flush_cache
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flush_cache:
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addi 4,4,0x1f /* len = (len + 0x1f) / 0x20 */
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rlwinm. 4,4,27,5,31
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mtctr 4
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beqlr
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1: dcbf 0,3
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icbi 0,3
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addi 3,3,0x20
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bdnz 1b
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sync
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isync
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blr
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