forked from luck/tmp_suning_uos_patched
c22c2c6008
This is a simple move of all header files that are no longer included by anything else from the include/mach directory to the platform directory itself as preparation for multiplatform support. The mach/uncompress.h headers are left in place for now, and are mildly modified to be independent of the other headers. They will be removed entirely when ARCH_MULTIPLATFORM gets enabled and they become obsolete. Rather than updating the path names inside of the comments of each header, I delete those comments to avoid having to update them again, should they get moved or copied another time. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
36 lines
1012 B
C
36 lines
1012 B
C
/*
|
|
* Orion CPU Bridge Registers
|
|
*
|
|
* This file is licensed under the terms of the GNU General Public
|
|
* License version 2. This program is licensed "as is" without any
|
|
* warranty of any kind, whether express or implied.
|
|
*/
|
|
|
|
#ifndef __ASM_ARCH_BRIDGE_REGS_H
|
|
#define __ASM_ARCH_BRIDGE_REGS_H
|
|
|
|
#include "orion5x.h"
|
|
|
|
#define CPU_CONF (ORION5X_BRIDGE_VIRT_BASE + 0x100)
|
|
|
|
#define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE + 0x104)
|
|
|
|
#define RSTOUTn_MASK (ORION5X_BRIDGE_VIRT_BASE + 0x108)
|
|
#define RSTOUTn_MASK_PHYS (ORION5X_BRIDGE_PHYS_BASE + 0x108)
|
|
|
|
#define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE + 0x10c)
|
|
|
|
#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE + 0x110)
|
|
|
|
#define POWER_MNG_CTRL_REG (ORION5X_BRIDGE_VIRT_BASE + 0x11C)
|
|
|
|
#define BRIDGE_INT_TIMER1_CLR (~0x0004)
|
|
|
|
#define MAIN_IRQ_CAUSE (ORION5X_BRIDGE_VIRT_BASE + 0x200)
|
|
|
|
#define MAIN_IRQ_MASK (ORION5X_BRIDGE_VIRT_BASE + 0x204)
|
|
|
|
#define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE + 0x300)
|
|
#define TIMER_PHYS_BASE (ORION5X_BRIDGE_PHYS_BASE + 0x300)
|
|
#endif
|