Paul Walmsley 3c01cf3bef memory: tegra: Add support for a variable-size client ID bitfield ... Recent versions of the Tegra MC hardware extend the size of the client ID bitfield in the MC_ERR_STATUS register by one bit. While one could simply extend the bitfield for older hardware, that would allow data from reserved bits into the driver code, which is generally a bad idea on principle. So this patch instead passes in the client ID mask from from the per-SoC MC data. There's no MC support for T210 (yet), but when that support winds up in the kernel, the appropriate soc->client_id_mask value for that chip will be 0xff. Based on an original patch by David Ung <davidu@nvidia.com>. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Paul Walmsley <pwalmsley@nvidia.com> Cc: Thierry Reding <treding@nvidia.com> Cc: David Ung <davidu@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>		2015-08-13 16:07:52 +02:00
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at91	ARM: at91: remove at91rm9200_sdramc.h	2015-05-20 16:37:55 +02:00
imx	ARM: imx: define an enum for gpt timer device type	2015-06-03 14:52:26 +08:00
sa1100	ARM: 8361/1: sa1100: add platform functions to handle PWER settings	2015-05-18 22:00:22 +01:00
tegra	memory: tegra: Add support for a variable-size client ID bitfield	2015-08-13 16:07:52 +02:00