forked from luck/tmp_suning_uos_patched
061d19f279
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.
After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.
This removes all the powerpc uses of the __cpuinit macros. There
are no __CPUINIT users in assembly files in powerpc.
[1] https://lkml.org/lkml/2013/5/20/589
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Josh Boyer <jwboyer@gmail.com>
Cc: Matt Porter <mporter@kernel.crashing.org>
Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
169 lines
4.2 KiB
C
169 lines
4.2 KiB
C
/*
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* PPC476 board specific routines
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*
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* Copyright 2010 Torez Smith, IBM Corporation.
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*
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* Based on earlier code:
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* Matt Porter <mporter@kernel.crashing.org>
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* Copyright 2002-2005 MontaVista Software Inc.
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*
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* Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
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* Copyright (c) 2003-2005 Zultys Technologies
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*
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* Rewritten and ported to the merged powerpc tree:
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* Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/init.h>
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#include <linux/of_platform.h>
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#include <linux/rtc.h>
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#include <asm/machdep.h>
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#include <asm/prom.h>
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#include <asm/udbg.h>
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#include <asm/time.h>
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#include <asm/uic.h>
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#include <asm/ppc4xx.h>
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#include <asm/mpic.h>
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#include <asm/mmu.h>
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static __initdata struct of_device_id iss4xx_of_bus[] = {
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{ .compatible = "ibm,plb4", },
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{ .compatible = "ibm,plb6", },
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{ .compatible = "ibm,opb", },
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{ .compatible = "ibm,ebc", },
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{},
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};
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static int __init iss4xx_device_probe(void)
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{
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of_platform_bus_probe(NULL, iss4xx_of_bus, NULL);
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of_instantiate_rtc();
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return 0;
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}
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machine_device_initcall(iss4xx, iss4xx_device_probe);
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/* We can have either UICs or MPICs */
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static void __init iss4xx_init_irq(void)
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{
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struct device_node *np;
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/* Find top level interrupt controller */
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for_each_node_with_property(np, "interrupt-controller") {
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if (of_get_property(np, "interrupts", NULL) == NULL)
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break;
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}
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if (np == NULL)
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panic("Can't find top level interrupt controller");
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/* Check type and do appropriate initialization */
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if (of_device_is_compatible(np, "ibm,uic")) {
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uic_init_tree();
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ppc_md.get_irq = uic_get_irq;
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#ifdef CONFIG_MPIC
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} else if (of_device_is_compatible(np, "chrp,open-pic")) {
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/* The MPIC driver will get everything it needs from the
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* device-tree, just pass 0 to all arguments
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*/
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struct mpic *mpic = mpic_alloc(np, 0, MPIC_NO_RESET, 0, 0, " MPIC ");
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BUG_ON(mpic == NULL);
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mpic_init(mpic);
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ppc_md.get_irq = mpic_get_irq;
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#endif
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} else
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panic("Unrecognized top level interrupt controller");
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}
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#ifdef CONFIG_SMP
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static void smp_iss4xx_setup_cpu(int cpu)
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{
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mpic_setup_this_cpu();
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}
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static int smp_iss4xx_kick_cpu(int cpu)
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{
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struct device_node *cpunode = of_get_cpu_node(cpu, NULL);
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const u64 *spin_table_addr_prop;
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u32 *spin_table;
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extern void start_secondary_47x(void);
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BUG_ON(cpunode == NULL);
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/* Assume spin table. We could test for the enable-method in
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* the device-tree but currently there's little point as it's
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* our only supported method
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*/
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spin_table_addr_prop = of_get_property(cpunode, "cpu-release-addr",
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NULL);
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if (spin_table_addr_prop == NULL) {
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pr_err("CPU%d: Can't start, missing cpu-release-addr !\n", cpu);
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return -ENOENT;
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}
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/* Assume it's mapped as part of the linear mapping. This is a bit
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* fishy but will work fine for now
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*/
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spin_table = (u32 *)__va(*spin_table_addr_prop);
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pr_debug("CPU%d: Spin table mapped at %p\n", cpu, spin_table);
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spin_table[3] = cpu;
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smp_wmb();
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spin_table[1] = __pa(start_secondary_47x);
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mb();
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return 0;
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}
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static struct smp_ops_t iss_smp_ops = {
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.probe = smp_mpic_probe,
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.message_pass = smp_mpic_message_pass,
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.setup_cpu = smp_iss4xx_setup_cpu,
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.kick_cpu = smp_iss4xx_kick_cpu,
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.give_timebase = smp_generic_give_timebase,
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.take_timebase = smp_generic_take_timebase,
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};
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static void __init iss4xx_smp_init(void)
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{
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if (mmu_has_feature(MMU_FTR_TYPE_47x))
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smp_ops = &iss_smp_ops;
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}
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#else /* CONFIG_SMP */
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static void __init iss4xx_smp_init(void) { }
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#endif /* CONFIG_SMP */
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static void __init iss4xx_setup_arch(void)
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{
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iss4xx_smp_init();
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}
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/*
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* Called very early, MMU is off, device-tree isn't unflattened
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*/
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static int __init iss4xx_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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if (!of_flat_dt_is_compatible(root, "ibm,iss-4xx"))
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return 0;
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return 1;
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}
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define_machine(iss4xx) {
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.name = "ISS-4xx",
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.probe = iss4xx_probe,
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.progress = udbg_progress,
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.init_IRQ = iss4xx_init_irq,
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.setup_arch = iss4xx_setup_arch,
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.restart = ppc4xx_reset_system,
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.calibrate_decr = generic_calibrate_decr,
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};
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