forked from luck/tmp_suning_uos_patched
f18edc95a3
Real i386 CPUs do not have cmpxchg instructions. Catch it before crashing on an invalid opcode. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
132 lines
3.2 KiB
C
132 lines
3.2 KiB
C
#ifndef _ASM_X86_FUTEX_H
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#define _ASM_X86_FUTEX_H
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#ifdef __KERNEL__
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#include <linux/futex.h>
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#include <asm/asm.h>
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#include <asm/errno.h>
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#include <asm/processor.h>
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#include <asm/system.h>
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#include <asm/uaccess.h>
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#define __futex_atomic_op1(insn, ret, oldval, uaddr, oparg) \
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__asm__ __volatile( \
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"1: " insn "\n" \
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"2: .section .fixup,\"ax\"\n \
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3: mov %3, %1\n \
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jmp 2b\n \
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.previous\n" \
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_ASM_EXTABLE(1b,3b) \
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: "=r" (oldval), "=r" (ret), "+m" (*uaddr) \
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: "i" (-EFAULT), "0" (oparg), "1" (0))
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#define __futex_atomic_op2(insn, ret, oldval, uaddr, oparg) \
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__asm__ __volatile( \
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"1: movl %2, %0\n \
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movl %0, %3\n" \
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insn "\n" \
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"2: lock; cmpxchgl %3, %2\n \
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jnz 1b\n \
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3: .section .fixup,\"ax\"\n \
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4: mov %5, %1\n \
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jmp 3b\n \
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.previous\n" \
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_ASM_EXTABLE(1b,4b) \
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_ASM_EXTABLE(2b,4b) \
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: "=&a" (oldval), "=&r" (ret), "+m" (*uaddr), \
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"=&r" (tem) \
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: "r" (oparg), "i" (-EFAULT), "1" (0))
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static inline int
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futex_atomic_op_inuser(int encoded_op, int __user *uaddr)
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{
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int op = (encoded_op >> 28) & 7;
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int cmp = (encoded_op >> 24) & 15;
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int oparg = (encoded_op << 8) >> 20;
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int cmparg = (encoded_op << 20) >> 20;
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int oldval = 0, ret, tem;
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if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
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oparg = 1 << oparg;
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if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
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return -EFAULT;
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#if defined(CONFIG_X86_32) && !defined(CONFIG_X86_BSWAP)
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/* Real i386 machines can only support FUTEX_OP_SET */
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if (op != FUTEX_OP_SET && boot_cpu_data.x86 == 3)
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return -ENOSYS;
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#endif
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pagefault_disable();
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switch (op) {
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case FUTEX_OP_SET:
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__futex_atomic_op1("xchgl %0, %2", ret, oldval, uaddr, oparg);
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break;
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case FUTEX_OP_ADD:
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__futex_atomic_op1("lock; xaddl %0, %2", ret, oldval,
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uaddr, oparg);
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break;
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case FUTEX_OP_OR:
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__futex_atomic_op2("orl %4, %3", ret, oldval, uaddr, oparg);
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break;
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case FUTEX_OP_ANDN:
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__futex_atomic_op2("andl %4, %3", ret, oldval, uaddr, ~oparg);
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break;
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case FUTEX_OP_XOR:
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__futex_atomic_op2("xorl %4, %3", ret, oldval, uaddr, oparg);
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break;
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default:
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ret = -ENOSYS;
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}
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pagefault_enable();
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if (!ret) {
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switch (cmp) {
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case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
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case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
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case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
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case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
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case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
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case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
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default: ret = -ENOSYS;
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}
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}
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return ret;
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}
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static inline int
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futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
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{
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#if defined(CONFIG_X86_32) && !defined(CONFIG_X86_BSWAP)
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/* Real i386 machines have no cmpxchg instruction */
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if (boot_cpu_data.x86 == 3)
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return -ENOSYS;
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#endif
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if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
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return -EFAULT;
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__asm__ __volatile__(
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"1: lock; cmpxchgl %3, %1 \n"
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"2: .section .fixup, \"ax\" \n"
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"3: mov %2, %0 \n"
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" jmp 2b \n"
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" .previous \n"
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_ASM_EXTABLE(1b,3b)
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: "=a" (oldval), "+m" (*uaddr)
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: "i" (-EFAULT), "r" (newval), "0" (oldval)
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: "memory"
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);
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return oldval;
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}
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#endif
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#endif
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