kernel_optimize_test/arch/arm/mm
Santosh Shilimkar 5ba7037228 ARM: l2x0: Determine the cache size
The cache size is needed for to optimise range based
maintainance operations

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
2010-10-26 11:40:03 +05:30
..
abort-ev4.S
abort-ev4t.S
abort-ev5t.S
abort-ev5tj.S
abort-ev6.S
abort-ev7.S
abort-lv4t.S
abort-macro.S
abort-nommu.S
alignment.c ARM: 6401/1: plug a race in the alignment trap handler 2010-09-23 15:17:04 +01:00
cache-fa.S
cache-feroceon-l2.c
cache-l2x0.c ARM: l2x0: Determine the cache size 2010-10-26 11:40:03 +05:30
cache-tauros2.c
cache-v3.S
cache-v4.S
cache-v4wb.S
cache-v4wt.S
cache-v6.S
cache-v7.S
cache-xsc3l2.c
context.c
copypage-fa.c
copypage-feroceon.c
copypage-v3.c
copypage-v4mc.c
copypage-v4wb.c
copypage-v4wt.c
copypage-v6.c
copypage-xsc3.c
copypage-xscale.c
dma-mapping.c
extable.c
fault-armv.c
fault.c
fault.h
flush.c
highmem.c
init.c
iomap.c
ioremap.c
Kconfig ARM: Improve the L2 cache performance when PL310 is used 2010-10-26 11:39:54 +05:30
Makefile
mm.h
mmap.c
mmu.c ARM: 6407/1: mmu: Setup MT_MEMORY and MT_MEMORY_NONCACHED L1 entries 2010-09-25 15:58:39 +01:00
nommu.c
pabort-legacy.S
pabort-v6.S
pabort-v7.S
pgd.c
proc-arm6_7.S
proc-arm7tdmi.S
proc-arm9tdmi.S
proc-arm720.S
proc-arm740.S
proc-arm920.S
proc-arm922.S
proc-arm925.S
proc-arm926.S
proc-arm940.S
proc-arm946.S
proc-arm1020.S
proc-arm1020e.S
proc-arm1022.S
proc-arm1026.S
proc-fa526.S
proc-feroceon.S
proc-macros.S
proc-mohawk.S
proc-sa110.S
proc-sa1100.S
proc-syms.c
proc-v6.S
proc-v7.S ARM: 6398/1: add proc info for ARM11MPCore/Cortex-A9 from ARM 2010-09-17 16:44:24 +01:00
proc-xsc3.S
proc-xscale.S
tlb-fa.S
tlb-v3.S
tlb-v4.S
tlb-v4wb.S
tlb-v4wbi.S
tlb-v6.S
tlb-v7.S
vmregion.c
vmregion.h