forked from luck/tmp_suning_uos_patched
36366e367e
Commit716850ab10("MIPS: eBPF: Initial eBPF support for MIPS32 architecture.") enabled our eBPF JIT for MIPS32 kernels, whereas it has previously only been availailable for MIPS64. It was my understanding at the time that the BPF test suite was passing & JITing a comparable number of tests to our cBPF JIT [1], but it turns out that was not the case. The eBPF JIT has a number of problems on MIPS32: - Most notably various code paths still result in emission of MIPS64 instructions which will cause reserved instruction exceptions & kernel panics when run on MIPS32 CPUs. - The eBPF JIT doesn't account for differences between the O32 ABI used by MIPS32 kernels versus the N64 ABI used by MIPS64 kernels. Notably arguments beyond the first 4 are passed on the stack in O32, and this is entirely unhandled when JITing a BPF_CALL instruction. Stack space must be reserved for arguments even if they all fit in registers, and the callee is free to assume that stack space has been reserved for its use - with the eBPF JIT this is not the case, so calling any function can result in clobbering values on the stack & unpredictable behaviour. Function arguments in eBPF are always 64-bit values which is also entirely unhandled - the JIT still uses a single (32-bit) register per argument. As a result all function arguments are always passed incorrectly when JITing a BPF_CALL instruction, leading to kernel crashes or strange behavior. - The JIT attempts to bail our on use of ALU64 instructions or 64-bit memory access instructions. The code doing this at the start of build_one_insn() incorrectly checks whether BPF_OP() equals BPF_DW, when it should really be checking BPF_SIZE() & only doing so when BPF_CLASS() is one of BPF_{LD,LDX,ST,STX}. This results in false positives that cause more bailouts than intended, and that in turns hides some of the problems described above. - The kernel's cBPF->eBPF translation makes heavy use of 64-bit eBPF instructions that the MIPS32 eBPF JIT bails out on, leading to most cBPF programs not being JITed at all. Until these problems are resolved, revert the removal of the cBPF JIT performed by commit716850ab10("MIPS: eBPF: Initial eBPF support for MIPS32 architecture."). Together with commitf8fffebdea("MIPS: BPF: Disable MIPS32 eBPF JIT") this restores MIPS32 BPF JIT behavior back to the same state it was prior to the introduction of the broken eBPF JIT support. [1] https://lore.kernel.org/linux-mips/MWHPR2201MB13583388481F01A422CE7D66D4410@MWHPR2201MB1358.namprd22.prod.outlook.com/ Signed-off-by: Paul Burton <paulburton@kernel.org> Fixes:716850ab10("MIPS: eBPF: Initial eBPF support for MIPS32 architecture.") Cc: Daniel Borkmann <daniel@iogearbox.net> Cc: Hassan Naveed <hnaveed@wavecomp.com> Cc: Tony Ambardar <itugrok@yahoo.com> Cc: bpf@vger.kernel.org Cc: netdev@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org
286 lines
6.8 KiB
ArmAsm
286 lines
6.8 KiB
ArmAsm
/*
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* bpf_jib_asm.S: Packet/header access helper functions for MIPS/MIPS64 BPF
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* compiler.
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*
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* Copyright (C) 2015 Imagination Technologies Ltd.
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* Author: Markos Chandras <markos.chandras@imgtec.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; version 2 of the License.
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*/
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#include <asm/asm.h>
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#include <asm/isa-rev.h>
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#include <asm/regdef.h>
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#include "bpf_jit.h"
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/* ABI
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*
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* r_skb_hl skb header length
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* r_skb_data skb data
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* r_off(a1) offset register
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* r_A BPF register A
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* r_X PF register X
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* r_skb(a0) *skb
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* r_M *scratch memory
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* r_skb_le skb length
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* r_s0 Scratch register 0
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* r_s1 Scratch register 1
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*
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* On entry:
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* a0: *skb
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* a1: offset (imm or imm + X)
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*
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* All non-BPF-ABI registers are free for use. On return, we only
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* care about r_ret. The BPF-ABI registers are assumed to remain
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* unmodified during the entire filter operation.
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*/
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#define skb a0
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#define offset a1
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#define SKF_LL_OFF (-0x200000) /* Can't include linux/filter.h in assembly */
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/* We know better :) so prevent assembler reordering etc */
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.set noreorder
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#define is_offset_negative(TYPE) \
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/* If offset is negative we have more work to do */ \
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slti t0, offset, 0; \
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bgtz t0, bpf_slow_path_##TYPE##_neg; \
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/* Be careful what follows in DS. */
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#define is_offset_in_header(SIZE, TYPE) \
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/* Reading from header? */ \
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addiu $r_s0, $r_skb_hl, -SIZE; \
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slt t0, $r_s0, offset; \
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bgtz t0, bpf_slow_path_##TYPE; \
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LEAF(sk_load_word)
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is_offset_negative(word)
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FEXPORT(sk_load_word_positive)
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is_offset_in_header(4, word)
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/* Offset within header boundaries */
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PTR_ADDU t1, $r_skb_data, offset
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.set reorder
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lw $r_A, 0(t1)
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.set noreorder
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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# if MIPS_ISA_REV >= 2
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wsbh t0, $r_A
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rotr $r_A, t0, 16
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# else
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sll t0, $r_A, 24
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srl t1, $r_A, 24
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srl t2, $r_A, 8
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or t0, t0, t1
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andi t2, t2, 0xff00
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andi t1, $r_A, 0xff00
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or t0, t0, t2
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sll t1, t1, 8
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or $r_A, t0, t1
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# endif
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#endif
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jr $r_ra
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move $r_ret, zero
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END(sk_load_word)
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LEAF(sk_load_half)
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is_offset_negative(half)
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FEXPORT(sk_load_half_positive)
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is_offset_in_header(2, half)
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/* Offset within header boundaries */
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PTR_ADDU t1, $r_skb_data, offset
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lhu $r_A, 0(t1)
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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# if MIPS_ISA_REV >= 2
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wsbh $r_A, $r_A
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# else
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sll t0, $r_A, 8
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srl t1, $r_A, 8
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andi t0, t0, 0xff00
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or $r_A, t0, t1
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# endif
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#endif
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jr $r_ra
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move $r_ret, zero
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END(sk_load_half)
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LEAF(sk_load_byte)
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is_offset_negative(byte)
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FEXPORT(sk_load_byte_positive)
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is_offset_in_header(1, byte)
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/* Offset within header boundaries */
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PTR_ADDU t1, $r_skb_data, offset
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lbu $r_A, 0(t1)
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jr $r_ra
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move $r_ret, zero
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END(sk_load_byte)
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/*
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* call skb_copy_bits:
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* (prototype in linux/skbuff.h)
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*
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* int skb_copy_bits(sk_buff *skb, int offset, void *to, int len)
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*
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* o32 mandates we leave 4 spaces for argument registers in case
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* the callee needs to use them. Even though we don't care about
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* the argument registers ourselves, we need to allocate that space
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* to remain ABI compliant since the callee may want to use that space.
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* We also allocate 2 more spaces for $r_ra and our return register (*to).
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*
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* n64 is a bit different. The *caller* will allocate the space to preserve
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* the arguments. So in 64-bit kernels, we allocate the 4-arg space for no
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* good reason but it does not matter that much really.
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*
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* (void *to) is returned in r_s0
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*
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*/
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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#define DS_OFFSET(SIZE) (4 * SZREG)
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#else
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#define DS_OFFSET(SIZE) ((4 * SZREG) + (4 - SIZE))
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#endif
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#define bpf_slow_path_common(SIZE) \
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/* Quick check. Are we within reasonable boundaries? */ \
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LONG_ADDIU $r_s1, $r_skb_len, -SIZE; \
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sltu $r_s0, offset, $r_s1; \
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beqz $r_s0, fault; \
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/* Load 4th argument in DS */ \
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LONG_ADDIU a3, zero, SIZE; \
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PTR_ADDIU $r_sp, $r_sp, -(6 * SZREG); \
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PTR_LA t0, skb_copy_bits; \
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PTR_S $r_ra, (5 * SZREG)($r_sp); \
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/* Assign low slot to a2 */ \
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PTR_ADDIU a2, $r_sp, DS_OFFSET(SIZE); \
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jalr t0; \
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/* Reset our destination slot (DS but it's ok) */ \
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INT_S zero, (4 * SZREG)($r_sp); \
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/* \
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* skb_copy_bits returns 0 on success and -EFAULT \
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* on error. Our data live in a2. Do not bother with \
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* our data if an error has been returned. \
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*/ \
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/* Restore our frame */ \
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PTR_L $r_ra, (5 * SZREG)($r_sp); \
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INT_L $r_s0, (4 * SZREG)($r_sp); \
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bltz v0, fault; \
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PTR_ADDIU $r_sp, $r_sp, 6 * SZREG; \
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move $r_ret, zero; \
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NESTED(bpf_slow_path_word, (6 * SZREG), $r_sp)
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bpf_slow_path_common(4)
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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# if MIPS_ISA_REV >= 2
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wsbh t0, $r_s0
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jr $r_ra
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rotr $r_A, t0, 16
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# else
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sll t0, $r_s0, 24
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srl t1, $r_s0, 24
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srl t2, $r_s0, 8
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or t0, t0, t1
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andi t2, t2, 0xff00
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andi t1, $r_s0, 0xff00
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or t0, t0, t2
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sll t1, t1, 8
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jr $r_ra
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or $r_A, t0, t1
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# endif
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#else
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jr $r_ra
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move $r_A, $r_s0
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#endif
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END(bpf_slow_path_word)
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NESTED(bpf_slow_path_half, (6 * SZREG), $r_sp)
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bpf_slow_path_common(2)
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#ifdef CONFIG_CPU_LITTLE_ENDIAN
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# if MIPS_ISA_REV >= 2
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jr $r_ra
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wsbh $r_A, $r_s0
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# else
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sll t0, $r_s0, 8
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andi t1, $r_s0, 0xff00
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andi t0, t0, 0xff00
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srl t1, t1, 8
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jr $r_ra
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or $r_A, t0, t1
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# endif
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#else
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jr $r_ra
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move $r_A, $r_s0
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#endif
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END(bpf_slow_path_half)
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NESTED(bpf_slow_path_byte, (6 * SZREG), $r_sp)
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bpf_slow_path_common(1)
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jr $r_ra
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move $r_A, $r_s0
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END(bpf_slow_path_byte)
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/*
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* Negative entry points
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*/
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.macro bpf_is_end_of_data
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li t0, SKF_LL_OFF
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/* Reading link layer data? */
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slt t1, offset, t0
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bgtz t1, fault
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/* Be careful what follows in DS. */
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.endm
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/*
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* call skb_copy_bits:
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* (prototype in linux/filter.h)
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*
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* void *bpf_internal_load_pointer_neg_helper(const struct sk_buff *skb,
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* int k, unsigned int size)
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*
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* see above (bpf_slow_path_common) for ABI restrictions
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*/
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#define bpf_negative_common(SIZE) \
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PTR_ADDIU $r_sp, $r_sp, -(6 * SZREG); \
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PTR_LA t0, bpf_internal_load_pointer_neg_helper; \
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PTR_S $r_ra, (5 * SZREG)($r_sp); \
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jalr t0; \
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li a2, SIZE; \
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PTR_L $r_ra, (5 * SZREG)($r_sp); \
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/* Check return pointer */ \
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beqz v0, fault; \
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PTR_ADDIU $r_sp, $r_sp, 6 * SZREG; \
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/* Preserve our pointer */ \
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move $r_s0, v0; \
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/* Set return value */ \
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move $r_ret, zero; \
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bpf_slow_path_word_neg:
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bpf_is_end_of_data
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NESTED(sk_load_word_negative, (6 * SZREG), $r_sp)
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bpf_negative_common(4)
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jr $r_ra
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lw $r_A, 0($r_s0)
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END(sk_load_word_negative)
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bpf_slow_path_half_neg:
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bpf_is_end_of_data
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NESTED(sk_load_half_negative, (6 * SZREG), $r_sp)
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bpf_negative_common(2)
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jr $r_ra
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lhu $r_A, 0($r_s0)
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END(sk_load_half_negative)
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bpf_slow_path_byte_neg:
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bpf_is_end_of_data
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NESTED(sk_load_byte_negative, (6 * SZREG), $r_sp)
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bpf_negative_common(1)
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jr $r_ra
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lbu $r_A, 0($r_s0)
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END(sk_load_byte_negative)
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fault:
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jr $r_ra
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addiu $r_ret, zero, 1
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