Palmer Dabbelt 5d44bf2065 RISC-V: Remove mem_end command line processing ... This is just some cruft left over from before the port converted to device tree. The right way to handle memory regions is to specify them in the device tree, which BBL (our simplest bootloader) is already capable of doing. This patch simply removes the cruft. Signed-off-by: Palmer Dabbelt <palmer@sifive.com>		2018-01-30 19:09:53 -08:00
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vdso	RISC-V: Make __NR_riscv_flush_icache visible to userspace	2018-01-07 15:14:37 -08:00
.gitignore	RISC-V: Build Infrastructure	2017-09-26 15:26:49 -07:00
asm-offsets.c	RISC-V: Task implementation	2017-09-26 15:26:46 -07:00
cacheinfo.c
cpu.c
cpufeature.c	RISC-V: User-facing API	2017-09-26 15:26:48 -07:00
entry.S	riscv: rename SR_* constants to match the spec	2018-01-07 15:14:39 -08:00
head.S	RISC-V: move empty_zero_page definition to C and export it	2017-11-30 10:01:10 -08:00
irq.c
Makefile	RISC-V: Build Infrastructure	2017-09-26 15:26:49 -07:00
module.c	RISC-V: User-facing API	2017-09-26 15:26:48 -07:00
process.c	riscv: rename SR_* constants to match the spec	2018-01-07 15:14:39 -08:00
ptrace.c	RISC-V: User-facing API	2017-09-26 15:26:48 -07:00
reset.c
riscv_ksyms.c	RISC-V: Export some expected symbols for modules	2017-11-30 10:01:10 -08:00
setup.c	RISC-V: Remove mem_end command line processing	2018-01-30 19:09:53 -08:00
signal.c	RISC-V: User-facing API	2017-09-26 15:26:48 -07:00
smp.c	RISC-V: Fixes for clean allmodconfig build	2017-12-01 13:31:31 -08:00
smpboot.c
stacktrace.c
sys_riscv.c	RISC-V: Logical vs Bitwise typo	2017-12-11 07:51:06 -08:00
syscall_table.c	RISC-V: Make __NR_riscv_flush_icache visible to userspace	2018-01-07 15:14:37 -08:00
time.c
traps.c
vdso.c
vmlinux.lds.S	RISC-V: Build Infrastructure	2017-09-26 15:26:49 -07:00