forked from luck/tmp_suning_uos_patched
5df33a62c4
SPEAr SoCs used its own clock framework since now. From now on they will move to use common clock framework. This patch updates existing SPEAr machine support to adapt for common clock framework. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Reviewed-by: Mike Turquette <mturquette@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de>
123 lines
2.9 KiB
C
123 lines
2.9 KiB
C
/*
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* arch/arm/mach-spear6xx/spear6xx.c
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*
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* SPEAr6XX machines common source file
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*
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* Copyright (C) 2009 ST Microelectronics
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* Rajeev Kumar<rajeev-dlh.kumar@st.com>
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*
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* Copyright 2012 Stefan Roese <sr@denx.de>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <asm/hardware/vic.h>
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#include <asm/mach/arch.h>
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#include <mach/generic.h>
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#include <mach/hardware.h>
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/* Following will create static virtual/physical mappings */
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static struct map_desc spear6xx_io_desc[] __initdata = {
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{
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.virtual = VA_SPEAR6XX_ICM1_UART0_BASE,
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.pfn = __phys_to_pfn(SPEAR6XX_ICM1_UART0_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE
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}, {
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.virtual = VA_SPEAR6XX_CPU_VIC_PRI_BASE,
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.pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_PRI_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE
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}, {
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.virtual = VA_SPEAR6XX_CPU_VIC_SEC_BASE,
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.pfn = __phys_to_pfn(SPEAR6XX_CPU_VIC_SEC_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE
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}, {
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.virtual = VA_SPEAR6XX_ICM3_SYS_CTRL_BASE,
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.pfn = __phys_to_pfn(SPEAR6XX_ICM3_SYS_CTRL_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE
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}, {
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.virtual = VA_SPEAR6XX_ICM3_MISC_REG_BASE,
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.pfn = __phys_to_pfn(SPEAR6XX_ICM3_MISC_REG_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE
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},
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};
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/* This will create static memory mapping for selected devices */
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void __init spear6xx_map_io(void)
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{
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iotable_init(spear6xx_io_desc, ARRAY_SIZE(spear6xx_io_desc));
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}
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static void __init spear6xx_timer_init(void)
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{
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char pclk_name[] = "pll3_48m_clk";
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struct clk *gpt_clk, *pclk;
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spear6xx_clk_init();
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/* get the system timer clock */
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gpt_clk = clk_get_sys("gpt0", NULL);
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if (IS_ERR(gpt_clk)) {
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pr_err("%s:couldn't get clk for gpt\n", __func__);
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BUG();
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}
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/* get the suitable parent clock for timer*/
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pclk = clk_get(NULL, pclk_name);
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if (IS_ERR(pclk)) {
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pr_err("%s:couldn't get %s as parent for gpt\n",
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__func__, pclk_name);
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BUG();
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}
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clk_set_parent(gpt_clk, pclk);
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clk_put(gpt_clk);
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clk_put(pclk);
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spear_setup_timer();
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}
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struct sys_timer spear6xx_timer = {
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.init = spear6xx_timer_init,
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};
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static void __init spear600_dt_init(void)
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{
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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}
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static const char *spear600_dt_board_compat[] = {
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"st,spear600",
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NULL
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};
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static const struct of_device_id vic_of_match[] __initconst = {
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{ .compatible = "arm,pl190-vic", .data = vic_of_init, },
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{ /* Sentinel */ }
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};
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static void __init spear6xx_dt_init_irq(void)
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{
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of_irq_init(vic_of_match);
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}
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DT_MACHINE_START(SPEAR600_DT, "ST SPEAr600 (Flattened Device Tree)")
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.map_io = spear6xx_map_io,
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.init_irq = spear6xx_dt_init_irq,
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.handle_irq = vic_handle_irq,
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.timer = &spear6xx_timer,
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.init_machine = spear600_dt_init,
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.restart = spear_restart,
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.dt_compat = spear600_dt_board_compat,
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MACHINE_END
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