forked from luck/tmp_suning_uos_patched
4d2e26a38f
Convert docs to ReST and add them to the arch-specific book. The conversion here was trivial, as almost every file there was already using an elegant format close to ReST standard. The changes were mostly to mark literal blocks and add a few missing section title identifiers. One note with regards to "--": on Sphinx, this can't be used to identify a list, as it will format it badly. This can be used, however, to identify a long hyphen - and "---" is an even longer one. At its new index.rst, let's add a :orphan: while this is not linked to the main index.rst file, in order to avoid build warnings. Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> # cxl
76 lines
1.9 KiB
ReStructuredText
76 lines
1.9 KiB
ReStructuredText
==========================
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CPU to ISA Version Mapping
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==========================
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Mapping of some CPU versions to relevant ISA versions.
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========= ====================================================================
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CPU Architecture version
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========= ====================================================================
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Power9 Power ISA v3.0B
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Power8 Power ISA v2.07
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Power7 Power ISA v2.06
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Power6 Power ISA v2.05
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PA6T Power ISA v2.04
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Cell PPU - Power ISA v2.02 with some minor exceptions
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- Plus Altivec/VMX ~= 2.03
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Power5++ Power ISA v2.04 (no VMX)
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Power5+ Power ISA v2.03
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Power5 - PowerPC User Instruction Set Architecture Book I v2.02
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- PowerPC Virtual Environment Architecture Book II v2.02
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- PowerPC Operating Environment Architecture Book III v2.02
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PPC970 - PowerPC User Instruction Set Architecture Book I v2.01
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- PowerPC Virtual Environment Architecture Book II v2.01
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- PowerPC Operating Environment Architecture Book III v2.01
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- Plus Altivec/VMX ~= 2.03
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========= ====================================================================
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Key Features
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------------
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========== ==================
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CPU VMX (aka. Altivec)
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========== ==================
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Power9 Yes
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Power8 Yes
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Power7 Yes
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Power6 Yes
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PA6T Yes
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Cell PPU Yes
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Power5++ No
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Power5+ No
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Power5 No
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PPC970 Yes
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========== ==================
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========== ====
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CPU VSX
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========== ====
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Power9 Yes
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Power8 Yes
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Power7 Yes
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Power6 No
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PA6T No
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Cell PPU No
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Power5++ No
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Power5+ No
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Power5 No
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PPC970 No
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========== ====
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========== ====================================
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CPU Transactional Memory
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========== ====================================
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Power9 Yes (* see transactional_memory.txt)
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Power8 Yes
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Power7 No
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Power6 No
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PA6T No
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Cell PPU No
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Power5++ No
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Power5+ No
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Power5 No
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PPC970 No
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========== ====================================
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