forked from luck/tmp_suning_uos_patched
ff88b4724f
Erratum 71 of PXA270M Processor Family Specification Update (April 19, 2010) explains that watchdog reset time is just 8us insead of 10ms in EMTS. If SDRAM is not reset, it causes memory bus congestion and the device hangs. We put SDRAM in selfresh mode before watchdog reset, removing potential freezes. Without this patch PXA270-based ICP DAS LP-8x4x hangs after up to 40 reboots. With this patch it has successfully rebooted 500 times. Signed-off-by: Sergei Ianovich <ynvich@gmail.com> Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
114 lines
2.2 KiB
C
114 lines
2.2 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/gpio.h>
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#include <linux/io.h>
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#include <asm/proc-fns.h>
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#include <asm/system_misc.h>
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#include <mach/regs-ost.h>
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#include <mach/reset.h>
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#include <mach/smemc.h>
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unsigned int reset_status;
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EXPORT_SYMBOL(reset_status);
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static void do_hw_reset(void);
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static int reset_gpio = -1;
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int init_gpio_reset(int gpio, int output, int level)
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{
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int rc;
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rc = gpio_request(gpio, "reset generator");
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if (rc) {
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printk(KERN_ERR "Can't request reset_gpio\n");
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goto out;
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}
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if (output)
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rc = gpio_direction_output(gpio, level);
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else
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rc = gpio_direction_input(gpio);
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if (rc) {
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printk(KERN_ERR "Can't configure reset_gpio\n");
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gpio_free(gpio);
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goto out;
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}
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out:
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if (!rc)
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reset_gpio = gpio;
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return rc;
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}
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/*
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* Trigger GPIO reset.
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* This covers various types of logic connecting gpio pin
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* to RESET pins (nRESET or GPIO_RESET):
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*/
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static void do_gpio_reset(void)
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{
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BUG_ON(reset_gpio == -1);
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/* drive it low */
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gpio_direction_output(reset_gpio, 0);
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mdelay(2);
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/* rising edge or drive high */
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gpio_set_value(reset_gpio, 1);
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mdelay(2);
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/* falling edge */
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gpio_set_value(reset_gpio, 0);
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/* give it some time */
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mdelay(10);
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WARN_ON(1);
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/* fallback */
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do_hw_reset();
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}
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static void do_hw_reset(void)
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{
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/* Initialize the watchdog and let it fire */
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writel_relaxed(OWER_WME, OWER);
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writel_relaxed(OSSR_M3, OSSR);
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/* ... in 100 ms */
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writel_relaxed(readl_relaxed(OSCR) + 368640, OSMR3);
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/*
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* SDRAM hangs on watchdog reset on Marvell PXA270 (erratum 71)
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* we put SDRAM into self-refresh to prevent that
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*/
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while (1)
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writel_relaxed(MDREFR_SLFRSH, MDREFR);
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}
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void pxa_restart(enum reboot_mode mode, const char *cmd)
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{
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local_irq_disable();
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local_fiq_disable();
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clear_reset_status(RESET_STATUS_ALL);
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switch (mode) {
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case REBOOT_SOFT:
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/* Jump into ROM at address 0 */
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soft_restart(0);
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break;
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case REBOOT_GPIO:
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do_gpio_reset();
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break;
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case REBOOT_HARD:
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default:
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do_hw_reset();
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break;
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}
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}
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