forked from luck/tmp_suning_uos_patched
8a45450d0a
Easier for existence test (#ifdef) in userspace. Signed-off-by: Avi Kivity <avi@qumranet.com>
389 lines
8.6 KiB
C
389 lines
8.6 KiB
C
#ifndef __LINUX_KVM_H
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#define __LINUX_KVM_H
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/*
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* Userspace interface for /dev/kvm - kernel based virtual machine
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*
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* Note: you must update KVM_API_VERSION if you change this interface.
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*/
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#include <asm/types.h>
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#include <linux/ioctl.h>
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#define KVM_API_VERSION 12
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/* Architectural interrupt line count. */
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#define KVM_NR_INTERRUPTS 256
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/* for KVM_CREATE_MEMORY_REGION */
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struct kvm_memory_region {
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__u32 slot;
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__u32 flags;
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__u64 guest_phys_addr;
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__u64 memory_size; /* bytes */
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};
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/* for kvm_memory_region::flags */
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#define KVM_MEM_LOG_DIRTY_PAGES 1UL
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struct kvm_memory_alias {
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__u32 slot; /* this has a different namespace than memory slots */
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__u32 flags;
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__u64 guest_phys_addr;
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__u64 memory_size;
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__u64 target_phys_addr;
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};
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/* for KVM_IRQ_LINE */
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struct kvm_irq_level {
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/*
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* ACPI gsi notion of irq.
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* For IA-64 (APIC model) IOAPIC0: irq 0-23; IOAPIC1: irq 24-47..
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* For X86 (standard AT mode) PIC0/1: irq 0-15. IOAPIC0: 0-23..
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*/
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__u32 irq;
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__u32 level;
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};
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/* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
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struct kvm_pic_state {
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__u8 last_irr; /* edge detection */
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__u8 irr; /* interrupt request register */
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__u8 imr; /* interrupt mask register */
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__u8 isr; /* interrupt service register */
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__u8 priority_add; /* highest irq priority */
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__u8 irq_base;
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__u8 read_reg_select;
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__u8 poll;
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__u8 special_mask;
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__u8 init_state;
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__u8 auto_eoi;
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__u8 rotate_on_auto_eoi;
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__u8 special_fully_nested_mode;
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__u8 init4; /* true if 4 byte init */
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__u8 elcr; /* PIIX edge/trigger selection */
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__u8 elcr_mask;
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};
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#define KVM_IOAPIC_NUM_PINS 24
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struct kvm_ioapic_state {
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__u64 base_address;
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__u32 ioregsel;
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__u32 id;
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__u32 irr;
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__u32 pad;
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union {
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__u64 bits;
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struct {
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__u8 vector;
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__u8 delivery_mode:3;
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__u8 dest_mode:1;
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__u8 delivery_status:1;
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__u8 polarity:1;
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__u8 remote_irr:1;
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__u8 trig_mode:1;
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__u8 mask:1;
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__u8 reserve:7;
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__u8 reserved[4];
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__u8 dest_id;
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} fields;
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} redirtbl[KVM_IOAPIC_NUM_PINS];
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};
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#define KVM_IRQCHIP_PIC_MASTER 0
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#define KVM_IRQCHIP_PIC_SLAVE 1
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#define KVM_IRQCHIP_IOAPIC 2
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struct kvm_irqchip {
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__u32 chip_id;
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__u32 pad;
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union {
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char dummy[512]; /* reserving space */
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struct kvm_pic_state pic;
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struct kvm_ioapic_state ioapic;
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} chip;
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};
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#define KVM_EXIT_UNKNOWN 0
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#define KVM_EXIT_EXCEPTION 1
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#define KVM_EXIT_IO 2
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#define KVM_EXIT_HYPERCALL 3
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#define KVM_EXIT_DEBUG 4
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#define KVM_EXIT_HLT 5
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#define KVM_EXIT_MMIO 6
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#define KVM_EXIT_IRQ_WINDOW_OPEN 7
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#define KVM_EXIT_SHUTDOWN 8
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#define KVM_EXIT_FAIL_ENTRY 9
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#define KVM_EXIT_INTR 10
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#define KVM_EXIT_SET_TPR 11
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/* for KVM_RUN, returned by mmap(vcpu_fd, offset=0) */
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struct kvm_run {
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/* in */
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__u8 request_interrupt_window;
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__u8 padding1[7];
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/* out */
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__u32 exit_reason;
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__u8 ready_for_interrupt_injection;
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__u8 if_flag;
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__u8 padding2[2];
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/* in (pre_kvm_run), out (post_kvm_run) */
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__u64 cr8;
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__u64 apic_base;
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union {
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/* KVM_EXIT_UNKNOWN */
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struct {
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__u64 hardware_exit_reason;
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} hw;
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/* KVM_EXIT_FAIL_ENTRY */
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struct {
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__u64 hardware_entry_failure_reason;
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} fail_entry;
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/* KVM_EXIT_EXCEPTION */
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struct {
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__u32 exception;
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__u32 error_code;
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} ex;
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/* KVM_EXIT_IO */
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struct kvm_io {
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#define KVM_EXIT_IO_IN 0
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#define KVM_EXIT_IO_OUT 1
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__u8 direction;
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__u8 size; /* bytes */
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__u16 port;
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__u32 count;
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__u64 data_offset; /* relative to kvm_run start */
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} io;
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struct {
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} debug;
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/* KVM_EXIT_MMIO */
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struct {
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__u64 phys_addr;
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__u8 data[8];
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__u32 len;
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__u8 is_write;
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} mmio;
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/* KVM_EXIT_HYPERCALL */
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struct {
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__u64 nr;
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__u64 args[6];
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__u64 ret;
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__u32 longmode;
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__u32 pad;
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} hypercall;
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/* Fix the size of the union. */
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char padding[256];
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};
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};
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/* for KVM_GET_REGS and KVM_SET_REGS */
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struct kvm_regs {
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/* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
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__u64 rax, rbx, rcx, rdx;
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__u64 rsi, rdi, rsp, rbp;
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__u64 r8, r9, r10, r11;
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__u64 r12, r13, r14, r15;
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__u64 rip, rflags;
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};
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/* for KVM_GET_FPU and KVM_SET_FPU */
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struct kvm_fpu {
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__u8 fpr[8][16];
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__u16 fcw;
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__u16 fsw;
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__u8 ftwx; /* in fxsave format */
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__u8 pad1;
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__u16 last_opcode;
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__u64 last_ip;
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__u64 last_dp;
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__u8 xmm[16][16];
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__u32 mxcsr;
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__u32 pad2;
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};
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/* for KVM_GET_LAPIC and KVM_SET_LAPIC */
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#define KVM_APIC_REG_SIZE 0x400
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struct kvm_lapic_state {
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char regs[KVM_APIC_REG_SIZE];
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};
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struct kvm_segment {
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__u64 base;
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__u32 limit;
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__u16 selector;
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__u8 type;
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__u8 present, dpl, db, s, l, g, avl;
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__u8 unusable;
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__u8 padding;
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};
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struct kvm_dtable {
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__u64 base;
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__u16 limit;
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__u16 padding[3];
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};
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/* for KVM_GET_SREGS and KVM_SET_SREGS */
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struct kvm_sregs {
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/* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
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struct kvm_segment cs, ds, es, fs, gs, ss;
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struct kvm_segment tr, ldt;
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struct kvm_dtable gdt, idt;
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__u64 cr0, cr2, cr3, cr4, cr8;
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__u64 efer;
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__u64 apic_base;
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__u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
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};
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struct kvm_msr_entry {
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__u32 index;
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__u32 reserved;
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__u64 data;
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};
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/* for KVM_GET_MSRS and KVM_SET_MSRS */
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struct kvm_msrs {
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__u32 nmsrs; /* number of msrs in entries */
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__u32 pad;
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struct kvm_msr_entry entries[0];
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};
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/* for KVM_GET_MSR_INDEX_LIST */
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struct kvm_msr_list {
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__u32 nmsrs; /* number of msrs in entries */
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__u32 indices[0];
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};
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/* for KVM_TRANSLATE */
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struct kvm_translation {
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/* in */
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__u64 linear_address;
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/* out */
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__u64 physical_address;
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__u8 valid;
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__u8 writeable;
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__u8 usermode;
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__u8 pad[5];
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};
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/* for KVM_INTERRUPT */
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struct kvm_interrupt {
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/* in */
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__u32 irq;
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};
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struct kvm_breakpoint {
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__u32 enabled;
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__u32 padding;
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__u64 address;
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};
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/* for KVM_DEBUG_GUEST */
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struct kvm_debug_guest {
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/* int */
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__u32 enabled;
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__u32 pad;
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struct kvm_breakpoint breakpoints[4];
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__u32 singlestep;
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};
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/* for KVM_GET_DIRTY_LOG */
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struct kvm_dirty_log {
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__u32 slot;
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__u32 padding;
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union {
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void __user *dirty_bitmap; /* one bit per page */
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__u64 padding;
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};
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};
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struct kvm_cpuid_entry {
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__u32 function;
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__u32 eax;
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__u32 ebx;
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__u32 ecx;
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__u32 edx;
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__u32 padding;
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};
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/* for KVM_SET_CPUID */
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struct kvm_cpuid {
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__u32 nent;
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__u32 padding;
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struct kvm_cpuid_entry entries[0];
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};
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/* for KVM_SET_SIGNAL_MASK */
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struct kvm_signal_mask {
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__u32 len;
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__u8 sigset[0];
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};
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#define KVMIO 0xAE
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/*
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* ioctls for /dev/kvm fds:
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*/
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#define KVM_GET_API_VERSION _IO(KVMIO, 0x00)
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#define KVM_CREATE_VM _IO(KVMIO, 0x01) /* returns a VM fd */
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#define KVM_GET_MSR_INDEX_LIST _IOWR(KVMIO, 0x02, struct kvm_msr_list)
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/*
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* Check if a kvm extension is available. Argument is extension number,
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* return is 1 (yes) or 0 (no, sorry).
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*/
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#define KVM_CHECK_EXTENSION _IO(KVMIO, 0x03)
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/*
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* Get size for mmap(vcpu_fd)
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*/
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#define KVM_GET_VCPU_MMAP_SIZE _IO(KVMIO, 0x04) /* in bytes */
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/*
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* Extension capability list.
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*/
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#define KVM_CAP_IRQCHIP 0
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#define KVM_CAP_HLT 1
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/*
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* ioctls for VM fds
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*/
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#define KVM_SET_MEMORY_REGION _IOW(KVMIO, 0x40, struct kvm_memory_region)
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/*
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* KVM_CREATE_VCPU receives as a parameter the vcpu slot, and returns
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* a vcpu fd.
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*/
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#define KVM_CREATE_VCPU _IO(KVMIO, 0x41)
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#define KVM_GET_DIRTY_LOG _IOW(KVMIO, 0x42, struct kvm_dirty_log)
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#define KVM_SET_MEMORY_ALIAS _IOW(KVMIO, 0x43, struct kvm_memory_alias)
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/* Device model IOC */
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#define KVM_CREATE_IRQCHIP _IO(KVMIO, 0x60)
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#define KVM_IRQ_LINE _IOW(KVMIO, 0x61, struct kvm_irq_level)
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#define KVM_GET_IRQCHIP _IOWR(KVMIO, 0x62, struct kvm_irqchip)
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#define KVM_SET_IRQCHIP _IOR(KVMIO, 0x63, struct kvm_irqchip)
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/*
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* ioctls for vcpu fds
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*/
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#define KVM_RUN _IO(KVMIO, 0x80)
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#define KVM_GET_REGS _IOR(KVMIO, 0x81, struct kvm_regs)
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#define KVM_SET_REGS _IOW(KVMIO, 0x82, struct kvm_regs)
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#define KVM_GET_SREGS _IOR(KVMIO, 0x83, struct kvm_sregs)
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#define KVM_SET_SREGS _IOW(KVMIO, 0x84, struct kvm_sregs)
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#define KVM_TRANSLATE _IOWR(KVMIO, 0x85, struct kvm_translation)
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#define KVM_INTERRUPT _IOW(KVMIO, 0x86, struct kvm_interrupt)
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#define KVM_DEBUG_GUEST _IOW(KVMIO, 0x87, struct kvm_debug_guest)
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#define KVM_GET_MSRS _IOWR(KVMIO, 0x88, struct kvm_msrs)
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#define KVM_SET_MSRS _IOW(KVMIO, 0x89, struct kvm_msrs)
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#define KVM_SET_CPUID _IOW(KVMIO, 0x8a, struct kvm_cpuid)
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#define KVM_SET_SIGNAL_MASK _IOW(KVMIO, 0x8b, struct kvm_signal_mask)
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#define KVM_GET_FPU _IOR(KVMIO, 0x8c, struct kvm_fpu)
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#define KVM_SET_FPU _IOW(KVMIO, 0x8d, struct kvm_fpu)
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#define KVM_GET_LAPIC _IOR(KVMIO, 0x8e, struct kvm_lapic_state)
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#define KVM_SET_LAPIC _IOW(KVMIO, 0x8f, struct kvm_lapic_state)
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#endif
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