forked from luck/tmp_suning_uos_patched
d4bc99b977
Current AP4 FSI set_rate function used bogus clock process which didn't care enable/disable and clk->usecound. To solve this issue, this patch also modify FSI driver to call set_rate with enough options. This patch modify it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
120 lines
3.0 KiB
C
120 lines
3.0 KiB
C
#ifndef __SOUND_FSI_H
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#define __SOUND_FSI_H
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/*
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* Fifo-attached Serial Interface (FSI) support for SH7724
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*
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* Copyright (C) 2009 Renesas Solutions Corp.
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* Kuninori Morimoto <morimoto.kuninori@renesas.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define FSI_PORT_A 0
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#define FSI_PORT_B 1
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/* flags format
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* 0xABCDEEFF
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*
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* A: channel size for TDM (input)
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* B: channel size for TDM (ooutput)
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* C: inversion
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* D: mode
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* E: input format
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* F: output format
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*/
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#include <linux/clk.h>
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#include <sound/soc.h>
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/* TDM channel */
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#define SH_FSI_SET_CH_I(x) ((x & 0xF) << 28)
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#define SH_FSI_SET_CH_O(x) ((x & 0xF) << 24)
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#define SH_FSI_CH_IMASK 0xF0000000
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#define SH_FSI_CH_OMASK 0x0F000000
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#define SH_FSI_GET_CH_I(x) ((x & SH_FSI_CH_IMASK) >> 28)
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#define SH_FSI_GET_CH_O(x) ((x & SH_FSI_CH_OMASK) >> 24)
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/* clock inversion */
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#define SH_FSI_INVERSION_MASK 0x00F00000
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#define SH_FSI_LRM_INV (1 << 20)
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#define SH_FSI_BRM_INV (1 << 21)
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#define SH_FSI_LRS_INV (1 << 22)
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#define SH_FSI_BRS_INV (1 << 23)
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/* mode */
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#define SH_FSI_MODE_MASK 0x000F0000
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#define SH_FSI_IN_SLAVE_MODE (1 << 16) /* default master mode */
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#define SH_FSI_OUT_SLAVE_MODE (1 << 17) /* default master mode */
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/* DI format */
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#define SH_FSI_FMT_MASK 0x000000FF
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#define SH_FSI_IFMT(x) (((SH_FSI_FMT_ ## x) & SH_FSI_FMT_MASK) << 8)
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#define SH_FSI_OFMT(x) (((SH_FSI_FMT_ ## x) & SH_FSI_FMT_MASK) << 0)
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#define SH_FSI_GET_IFMT(x) ((x >> 8) & SH_FSI_FMT_MASK)
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#define SH_FSI_GET_OFMT(x) ((x >> 0) & SH_FSI_FMT_MASK)
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#define SH_FSI_FMT_MONO 0
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#define SH_FSI_FMT_MONO_DELAY 1
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#define SH_FSI_FMT_PCM 2
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#define SH_FSI_FMT_I2S 3
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#define SH_FSI_FMT_TDM 4
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#define SH_FSI_FMT_TDM_DELAY 5
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#define SH_FSI_FMT_SPDIF 6
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#define SH_FSI_IFMT_TDM_CH(x) \
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(SH_FSI_IFMT(TDM) | SH_FSI_SET_CH_I(x))
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#define SH_FSI_IFMT_TDM_DELAY_CH(x) \
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(SH_FSI_IFMT(TDM_DELAY) | SH_FSI_SET_CH_I(x))
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#define SH_FSI_OFMT_TDM_CH(x) \
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(SH_FSI_OFMT(TDM) | SH_FSI_SET_CH_O(x))
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#define SH_FSI_OFMT_TDM_DELAY_CH(x) \
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(SH_FSI_OFMT(TDM_DELAY) | SH_FSI_SET_CH_O(x))
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/*
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* set_rate return value
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*
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* see ACKMD/BPFMD on
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* ACK_MD (FSI2)
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* CKG1 (FSI)
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*
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* err : return value < 0
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* no change : return value == 0
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* change xMD : return value > 0
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*
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* 0x-00000AB
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*
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* A: ACKMD value
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* B: BPFMD value
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*/
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#define SH_FSI_ACKMD_MASK (0xF << 0)
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#define SH_FSI_ACKMD_512 (1 << 0)
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#define SH_FSI_ACKMD_256 (2 << 0)
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#define SH_FSI_ACKMD_128 (3 << 0)
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#define SH_FSI_ACKMD_64 (4 << 0)
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#define SH_FSI_ACKMD_32 (5 << 0)
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#define SH_FSI_BPFMD_MASK (0xF << 4)
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#define SH_FSI_BPFMD_512 (1 << 4)
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#define SH_FSI_BPFMD_256 (2 << 4)
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#define SH_FSI_BPFMD_128 (3 << 4)
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#define SH_FSI_BPFMD_64 (4 << 4)
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#define SH_FSI_BPFMD_32 (5 << 4)
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#define SH_FSI_BPFMD_16 (6 << 4)
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struct sh_fsi_platform_info {
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unsigned long porta_flags;
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unsigned long portb_flags;
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int (*set_rate)(struct device *dev, int is_porta, int rate, int enable);
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};
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#endif /* __SOUND_FSI_H */
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