forked from luck/tmp_suning_uos_patched
3961d355df
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) removed the A3IR power domain on R-Car M3-N, as this SoC does not have an Image Processing Unit (IMP-X5). As of commitd8c6557bc9("arm64: dts: renesas: r8a77965: Remove non-existent IPMMU-IR"), this definition is no longer used from DT, and thus can be removed. Fixes:a527709b78("soc: renesas: rcar-sysc: Add R-Car M3-N support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
30 lines
819 B
C
30 lines
819 B
C
/* SPDX-License-Identifier: GPL-2.0 */
|
|
/*
|
|
* Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org>
|
|
* Copyright (C) 2016 Glider bvba
|
|
*/
|
|
|
|
#ifndef __DT_BINDINGS_POWER_R8A77965_SYSC_H__
|
|
#define __DT_BINDINGS_POWER_R8A77965_SYSC_H__
|
|
|
|
/*
|
|
* These power domain indices match the numbers of the interrupt bits
|
|
* representing the power areas in the various Interrupt Registers
|
|
* (e.g. SYSCISR, Interrupt Status Register)
|
|
*/
|
|
|
|
#define R8A77965_PD_CA57_CPU0 0
|
|
#define R8A77965_PD_CA57_CPU1 1
|
|
#define R8A77965_PD_A3VP 9
|
|
#define R8A77965_PD_CA57_SCU 12
|
|
#define R8A77965_PD_CR7 13
|
|
#define R8A77965_PD_A3VC 14
|
|
#define R8A77965_PD_3DG_A 17
|
|
#define R8A77965_PD_3DG_B 18
|
|
#define R8A77965_PD_A2VC1 26
|
|
|
|
/* Always-on power area */
|
|
#define R8A77965_PD_ALWAYS_ON 32
|
|
|
|
#endif /* __DT_BINDINGS_POWER_R8A77965_SYSC_H__ */
|