forked from luck/tmp_suning_uos_patched
640 lines
16 KiB
C
640 lines
16 KiB
C
/*
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/seq_file.h>
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#include <linux/fs.h>
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#include <linux/delay.h>
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#include <linux/root_dev.h>
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/clocksource.h>
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#include <linux/console.h>
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#include <linux/module.h>
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#include <linux/cpu.h>
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#include <linux/of_fdt.h>
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#include <linux/of.h>
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#include <linux/cache.h>
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#include <asm/sections.h>
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#include <asm/arcregs.h>
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#include <asm/tlb.h>
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#include <asm/setup.h>
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#include <asm/page.h>
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#include <asm/irq.h>
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#include <asm/unwind.h>
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#include <asm/mach_desc.h>
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#include <asm/smp.h>
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#define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
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unsigned int intr_to_DE_cnt;
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/* Part of U-boot ABI: see head.S */
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int __initdata uboot_tag;
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char __initdata *uboot_arg;
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const struct machine_desc *machine_desc;
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struct task_struct *_current_task[NR_CPUS]; /* For stack switching */
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struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
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static const struct id_to_str arc_cpu_rel[] = {
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#ifdef CONFIG_ISA_ARCOMPACT
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{ 0x34, "R4.10"},
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{ 0x35, "R4.11"},
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#else
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{ 0x51, "R2.0" },
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{ 0x52, "R2.1" },
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{ 0x53, "R3.0" },
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{ 0x54, "R3.10a" },
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#endif
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{ 0x00, NULL }
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};
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static const struct id_to_str arc_cpu_nm[] = {
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#ifdef CONFIG_ISA_ARCOMPACT
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{ 0x20, "ARC 600" },
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{ 0x30, "ARC 770" }, /* 750 identified seperately */
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#else
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{ 0x40, "ARC EM" },
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{ 0x50, "ARC HS38" },
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{ 0x54, "ARC HS48" },
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#endif
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{ 0x00, "Unknown" }
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};
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static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
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{
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if (is_isa_arcompact()) {
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struct bcr_iccm_arcompact iccm;
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struct bcr_dccm_arcompact dccm;
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READ_BCR(ARC_REG_ICCM_BUILD, iccm);
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if (iccm.ver) {
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cpu->iccm.sz = 4096 << iccm.sz; /* 8K to 512K */
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cpu->iccm.base_addr = iccm.base << 16;
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}
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READ_BCR(ARC_REG_DCCM_BUILD, dccm);
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if (dccm.ver) {
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unsigned long base;
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cpu->dccm.sz = 2048 << dccm.sz; /* 2K to 256K */
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base = read_aux_reg(ARC_REG_DCCM_BASE_BUILD);
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cpu->dccm.base_addr = base & ~0xF;
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}
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} else {
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struct bcr_iccm_arcv2 iccm;
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struct bcr_dccm_arcv2 dccm;
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unsigned long region;
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READ_BCR(ARC_REG_ICCM_BUILD, iccm);
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if (iccm.ver) {
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cpu->iccm.sz = 256 << iccm.sz00; /* 512B to 16M */
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if (iccm.sz00 == 0xF && iccm.sz01 > 0)
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cpu->iccm.sz <<= iccm.sz01;
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region = read_aux_reg(ARC_REG_AUX_ICCM);
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cpu->iccm.base_addr = region & 0xF0000000;
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}
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READ_BCR(ARC_REG_DCCM_BUILD, dccm);
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if (dccm.ver) {
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cpu->dccm.sz = 256 << dccm.sz0;
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if (dccm.sz0 == 0xF && dccm.sz1 > 0)
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cpu->dccm.sz <<= dccm.sz1;
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region = read_aux_reg(ARC_REG_AUX_DCCM);
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cpu->dccm.base_addr = region & 0xF0000000;
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}
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}
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}
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static void read_arc_build_cfg_regs(void)
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{
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struct bcr_timer timer;
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struct bcr_generic bcr;
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struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
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const struct id_to_str *tbl;
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struct bcr_isa_arcv2 isa;
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FIX_PTR(cpu);
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READ_BCR(AUX_IDENTITY, cpu->core);
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for (tbl = &arc_cpu_rel[0]; tbl->id != 0; tbl++) {
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if (cpu->core.family == tbl->id) {
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cpu->details = tbl->str;
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break;
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}
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}
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for (tbl = &arc_cpu_nm[0]; tbl->id != 0; tbl++) {
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if ((cpu->core.family & 0xF4) == tbl->id)
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break;
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}
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cpu->name = tbl->str;
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READ_BCR(ARC_REG_TIMERS_BCR, timer);
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cpu->extn.timer0 = timer.t0;
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cpu->extn.timer1 = timer.t1;
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cpu->extn.rtc = timer.rtc;
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cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
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READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
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cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
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cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
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cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0; /* 1,3 */
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cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
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cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
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cpu->extn.swape = (cpu->core.family >= 0x34) ? 1 :
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IS_ENABLED(CONFIG_ARC_HAS_SWAPE);
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READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
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/* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
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read_decode_ccm_bcr(cpu);
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read_decode_mmu_bcr();
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read_decode_cache_bcr();
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if (is_isa_arcompact()) {
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struct bcr_fp_arcompact sp, dp;
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struct bcr_bpu_arcompact bpu;
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READ_BCR(ARC_REG_FP_BCR, sp);
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READ_BCR(ARC_REG_DPFP_BCR, dp);
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cpu->extn.fpu_sp = sp.ver ? 1 : 0;
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cpu->extn.fpu_dp = dp.ver ? 1 : 0;
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READ_BCR(ARC_REG_BPU_BCR, bpu);
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cpu->bpu.ver = bpu.ver;
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cpu->bpu.full = bpu.fam ? 1 : 0;
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if (bpu.ent) {
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cpu->bpu.num_cache = 256 << (bpu.ent - 1);
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cpu->bpu.num_pred = 256 << (bpu.ent - 1);
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}
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} else {
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struct bcr_fp_arcv2 spdp;
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struct bcr_bpu_arcv2 bpu;
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READ_BCR(ARC_REG_FP_V2_BCR, spdp);
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cpu->extn.fpu_sp = spdp.sp ? 1 : 0;
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cpu->extn.fpu_dp = spdp.dp ? 1 : 0;
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READ_BCR(ARC_REG_BPU_BCR, bpu);
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cpu->bpu.ver = bpu.ver;
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cpu->bpu.full = bpu.ft;
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cpu->bpu.num_cache = 256 << bpu.bce;
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cpu->bpu.num_pred = 2048 << bpu.pte;
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if (cpu->core.family >= 0x54) {
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unsigned int exec_ctrl;
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READ_BCR(AUX_EXEC_CTRL, exec_ctrl);
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cpu->extn.dual_enb = !(exec_ctrl & 1);
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/* dual issue always present for this core */
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cpu->extn.dual = 1;
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}
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}
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READ_BCR(ARC_REG_AP_BCR, bcr);
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cpu->extn.ap = bcr.ver ? 1 : 0;
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READ_BCR(ARC_REG_SMART_BCR, bcr);
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cpu->extn.smart = bcr.ver ? 1 : 0;
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READ_BCR(ARC_REG_RTT_BCR, bcr);
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cpu->extn.rtt = bcr.ver ? 1 : 0;
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cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt;
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READ_BCR(ARC_REG_ISA_CFG_BCR, isa);
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/* some hacks for lack of feature BCR info in old ARC700 cores */
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if (is_isa_arcompact()) {
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if (!isa.ver) /* ISA BCR absent, use Kconfig info */
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cpu->isa.atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
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else {
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/* ARC700_BUILD only has 2 bits of isa info */
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struct bcr_generic bcr = *(struct bcr_generic *)&isa;
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cpu->isa.atomic = bcr.info & 1;
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}
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cpu->isa.be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
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/* there's no direct way to distinguish 750 vs. 770 */
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if (unlikely(cpu->core.family < 0x34 || cpu->mmu.ver < 3))
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cpu->name = "ARC750";
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} else {
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cpu->isa = isa;
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}
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}
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static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
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{
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struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
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struct bcr_identity *core = &cpu->core;
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int i, n = 0;
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FIX_PTR(cpu);
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n += scnprintf(buf + n, len - n,
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"\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
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core->family, core->cpu_id, core->chip_id);
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n += scnprintf(buf + n, len - n, "processor [%d]\t: %s %s (%s ISA) %s%s%s\n",
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cpu_id, cpu->name, cpu->details,
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is_isa_arcompact() ? "ARCompact" : "ARCv2",
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IS_AVAIL1(cpu->isa.be, "[Big-Endian]"),
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IS_AVAIL3(cpu->extn.dual, cpu->extn.dual_enb, " Dual-Issue "));
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n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s%s%s\nISA Extn\t: ",
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IS_AVAIL1(cpu->extn.timer0, "Timer0 "),
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IS_AVAIL1(cpu->extn.timer1, "Timer1 "),
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IS_AVAIL2(cpu->extn.rtc, "RTC [UP 64-bit] ", CONFIG_ARC_TIMERS_64BIT),
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IS_AVAIL2(cpu->extn.gfrc, "GFRC [SMP 64-bit] ", CONFIG_ARC_TIMERS_64BIT));
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n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
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IS_AVAIL2(cpu->isa.atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
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IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
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IS_AVAIL1(cpu->isa.unalign, "unalign (not used)"));
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if (i)
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n += scnprintf(buf + n, len - n, "\n\t\t: ");
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if (cpu->extn_mpy.ver) {
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if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */
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n += scnprintf(buf + n, len - n, "mpy ");
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} else {
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int opt = 2; /* stock MPY/MPYH */
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if (cpu->extn_mpy.dsp) /* OPT 7-9 */
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opt = cpu->extn_mpy.dsp + 6;
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n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
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}
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}
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n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
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IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
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IS_AVAIL1(cpu->extn.norm, "norm "),
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IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
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IS_AVAIL1(cpu->extn.swap, "swap "),
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IS_AVAIL1(cpu->extn.minmax, "minmax "),
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IS_AVAIL1(cpu->extn.crc, "crc "),
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IS_AVAIL2(cpu->extn.swape, "swape", CONFIG_ARC_HAS_SWAPE));
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if (cpu->bpu.ver)
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n += scnprintf(buf + n, len - n,
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"BPU\t\t: %s%s match, cache:%d, Predict Table:%d",
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IS_AVAIL1(cpu->bpu.full, "full"),
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IS_AVAIL1(!cpu->bpu.full, "partial"),
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cpu->bpu.num_cache, cpu->bpu.num_pred);
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if (is_isa_arcv2()) {
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struct bcr_lpb lpb;
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READ_BCR(ARC_REG_LPB_BUILD, lpb);
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if (lpb.ver) {
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unsigned int ctl;
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ctl = read_aux_reg(ARC_REG_LPB_CTRL);
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n += scnprintf(buf + n, len - n, " Loop Buffer:%d %s",
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lpb.entries,
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IS_DISABLED_RUN(!ctl));
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}
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}
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n += scnprintf(buf + n, len - n, "\n");
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return buf;
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}
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static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
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{
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int n = 0;
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struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
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FIX_PTR(cpu);
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n += scnprintf(buf + n, len - n, "Vector Table\t: %#x\n", cpu->vec_base);
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if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
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n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
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IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
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IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
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if (cpu->extn.debug)
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n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
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IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
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IS_AVAIL1(cpu->extn.smart, "smaRT "),
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IS_AVAIL1(cpu->extn.rtt, "RTT "));
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if (cpu->dccm.sz || cpu->iccm.sz)
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n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
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cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
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cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
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if (is_isa_arcv2()) {
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/* Error Protection: ECC/Parity */
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struct bcr_erp erp;
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READ_BCR(ARC_REG_ERP_BUILD, erp);
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if (erp.ver) {
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struct ctl_erp ctl;
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READ_BCR(ARC_REG_ERP_CTRL, ctl);
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/* inverted bits: 0 means enabled */
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n += scnprintf(buf + n, len - n, "Extn [ECC]\t: %s%s%s%s%s%s\n",
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IS_AVAIL3(erp.ic, !ctl.dpi, "IC "),
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IS_AVAIL3(erp.dc, !ctl.dpd, "DC "),
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IS_AVAIL3(erp.mmu, !ctl.mpd, "MMU "));
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}
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}
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n += scnprintf(buf + n, len - n, "OS ABI [v%d]\t: %s\n",
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EF_ARC_OSABI_CURRENT >> 8,
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EF_ARC_OSABI_CURRENT == EF_ARC_OSABI_V3 ?
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"no-legacy-syscalls" : "64-bit data any register aligned");
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return buf;
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}
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static void arc_chk_core_config(void)
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{
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struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
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int saved = 0, present = 0;
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char *opt_nm = NULL;
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if (!cpu->extn.timer0)
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panic("Timer0 is not present!\n");
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if (!cpu->extn.timer1)
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panic("Timer1 is not present!\n");
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#ifdef CONFIG_ARC_HAS_DCCM
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/*
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* DCCM can be arbit placed in hardware.
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* Make sure it's placement/sz matches what Linux is built with
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*/
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if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
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panic("Linux built with incorrect DCCM Base address\n");
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if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
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panic("Linux built with incorrect DCCM Size\n");
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#endif
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#ifdef CONFIG_ARC_HAS_ICCM
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if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
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panic("Linux built with incorrect ICCM Size\n");
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#endif
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/*
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* FP hardware/software config sanity
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* -If hardware present, kernel needs to save/restore FPU state
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* -If not, it will crash trying to save/restore the non-existant regs
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*/
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if (is_isa_arcompact()) {
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opt_nm = "CONFIG_ARC_FPU_SAVE_RESTORE";
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saved = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
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/* only DPDP checked since SP has no arch visible regs */
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present = cpu->extn.fpu_dp;
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} else {
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opt_nm = "CONFIG_ARC_HAS_ACCL_REGS";
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saved = IS_ENABLED(CONFIG_ARC_HAS_ACCL_REGS);
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/* Accumulator Low:High pair (r58:59) present if DSP MPY or FPU */
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present = cpu->extn_mpy.dsp | cpu->extn.fpu_sp | cpu->extn.fpu_dp;
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}
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if (present && !saved)
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pr_warn("Enable %s for working apps\n", opt_nm);
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else if (!present && saved)
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panic("Disable %s, hardware NOT present\n", opt_nm);
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}
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/*
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* Initialize and setup the processor core
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* This is called by all the CPUs thus should not do special case stuff
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* such as only for boot CPU etc
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*/
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void setup_processor(void)
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{
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char str[512];
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int cpu_id = smp_processor_id();
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read_arc_build_cfg_regs();
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arc_init_IRQ();
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pr_info("%s", arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
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arc_mmu_init();
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arc_cache_init();
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pr_info("%s", arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
|
|
pr_info("%s", arc_platform_smp_cpuinfo());
|
|
|
|
arc_chk_core_config();
|
|
}
|
|
|
|
static inline int is_kernel(unsigned long addr)
|
|
{
|
|
if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
|
|
return 1;
|
|
return 0;
|
|
}
|
|
|
|
void __init setup_arch(char **cmdline_p)
|
|
{
|
|
#ifdef CONFIG_ARC_UBOOT_SUPPORT
|
|
/* make sure that uboot passed pointer to cmdline/dtb is valid */
|
|
if (uboot_tag && is_kernel((unsigned long)uboot_arg))
|
|
panic("Invalid uboot arg\n");
|
|
|
|
/* See if u-boot passed an external Device Tree blob */
|
|
machine_desc = setup_machine_fdt(uboot_arg); /* uboot_tag == 2 */
|
|
if (!machine_desc)
|
|
#endif
|
|
{
|
|
/* No, so try the embedded one */
|
|
machine_desc = setup_machine_fdt(__dtb_start);
|
|
if (!machine_desc)
|
|
panic("Embedded DT invalid\n");
|
|
|
|
/*
|
|
* If we are here, it is established that @uboot_arg didn't
|
|
* point to DT blob. Instead if u-boot says it is cmdline,
|
|
* append to embedded DT cmdline.
|
|
* setup_machine_fdt() would have populated @boot_command_line
|
|
*/
|
|
if (uboot_tag == 1) {
|
|
/* Ensure a whitespace between the 2 cmdlines */
|
|
strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
|
|
strlcat(boot_command_line, uboot_arg,
|
|
COMMAND_LINE_SIZE);
|
|
}
|
|
}
|
|
|
|
/* Save unparsed command line copy for /proc/cmdline */
|
|
*cmdline_p = boot_command_line;
|
|
|
|
/* To force early parsing of things like mem=xxx */
|
|
parse_early_param();
|
|
|
|
/* Platform/board specific: e.g. early console registration */
|
|
if (machine_desc->init_early)
|
|
machine_desc->init_early();
|
|
|
|
smp_init_cpus();
|
|
|
|
setup_processor();
|
|
setup_arch_memory();
|
|
|
|
/* copy flat DT out of .init and then unflatten it */
|
|
unflatten_and_copy_device_tree();
|
|
|
|
/* Can be issue if someone passes cmd line arg "ro"
|
|
* But that is unlikely so keeping it as it is
|
|
*/
|
|
root_mountflags &= ~MS_RDONLY;
|
|
|
|
#if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
|
|
conswitchp = &dummy_con;
|
|
#endif
|
|
|
|
arc_unwind_init();
|
|
}
|
|
|
|
/*
|
|
* Called from start_kernel() - boot CPU only
|
|
*/
|
|
void __init time_init(void)
|
|
{
|
|
of_clk_init(NULL);
|
|
timer_probe();
|
|
}
|
|
|
|
static int __init customize_machine(void)
|
|
{
|
|
if (machine_desc->init_machine)
|
|
machine_desc->init_machine();
|
|
|
|
return 0;
|
|
}
|
|
arch_initcall(customize_machine);
|
|
|
|
static int __init init_late_machine(void)
|
|
{
|
|
if (machine_desc->init_late)
|
|
machine_desc->init_late();
|
|
|
|
return 0;
|
|
}
|
|
late_initcall(init_late_machine);
|
|
/*
|
|
* Get CPU information for use by the procfs.
|
|
*/
|
|
|
|
#define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c)))
|
|
#define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
|
|
|
|
static int show_cpuinfo(struct seq_file *m, void *v)
|
|
{
|
|
char *str;
|
|
int cpu_id = ptr_to_cpu(v);
|
|
struct device *cpu_dev = get_cpu_device(cpu_id);
|
|
struct clk *cpu_clk;
|
|
unsigned long freq = 0;
|
|
|
|
if (!cpu_online(cpu_id)) {
|
|
seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
|
|
goto done;
|
|
}
|
|
|
|
str = (char *)__get_free_page(GFP_KERNEL);
|
|
if (!str)
|
|
goto done;
|
|
|
|
seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
|
|
|
|
cpu_clk = clk_get(cpu_dev, NULL);
|
|
if (IS_ERR(cpu_clk)) {
|
|
seq_printf(m, "CPU speed \t: Cannot get clock for processor [%d]\n",
|
|
cpu_id);
|
|
} else {
|
|
freq = clk_get_rate(cpu_clk);
|
|
}
|
|
if (freq)
|
|
seq_printf(m, "CPU speed\t: %lu.%02lu Mhz\n",
|
|
freq / 1000000, (freq / 10000) % 100);
|
|
|
|
seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
|
|
loops_per_jiffy / (500000 / HZ),
|
|
(loops_per_jiffy / (5000 / HZ)) % 100);
|
|
|
|
seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
|
|
seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
|
|
seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
|
|
seq_printf(m, arc_platform_smp_cpuinfo());
|
|
|
|
free_page((unsigned long)str);
|
|
done:
|
|
seq_printf(m, "\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void *c_start(struct seq_file *m, loff_t *pos)
|
|
{
|
|
/*
|
|
* Callback returns cpu-id to iterator for show routine, NULL to stop.
|
|
* However since NULL is also a valid cpu-id (0), we use a round-about
|
|
* way to pass it w/o having to kmalloc/free a 2 byte string.
|
|
* Encode cpu-id as 0xFFcccc, which is decoded by show routine.
|
|
*/
|
|
return *pos < nr_cpu_ids ? cpu_to_ptr(*pos) : NULL;
|
|
}
|
|
|
|
static void *c_next(struct seq_file *m, void *v, loff_t *pos)
|
|
{
|
|
++*pos;
|
|
return c_start(m, pos);
|
|
}
|
|
|
|
static void c_stop(struct seq_file *m, void *v)
|
|
{
|
|
}
|
|
|
|
const struct seq_operations cpuinfo_op = {
|
|
.start = c_start,
|
|
.next = c_next,
|
|
.stop = c_stop,
|
|
.show = show_cpuinfo
|
|
};
|
|
|
|
static DEFINE_PER_CPU(struct cpu, cpu_topology);
|
|
|
|
static int __init topology_init(void)
|
|
{
|
|
int cpu;
|
|
|
|
for_each_present_cpu(cpu)
|
|
register_cpu(&per_cpu(cpu_topology, cpu), cpu);
|
|
|
|
return 0;
|
|
}
|
|
|
|
subsys_initcall(topology_init);
|