forked from luck/tmp_suning_uos_patched
12d04eef92
This patch completely refactors DMA operations for 64 bits powerpc. 32 bits is untouched for now. We use the new dev_archdata structure to add the dma operations pointer and associated data to struct device. While at it, we also add the OF node pointer and numa node. In the future, we might want to look into merging that with pci_dn as well. The old vio, pci-iommu and pci-direct DMA ops are gone. They are now replaced by a set of generic iommu and direct DMA ops (non PCI specific) that can be used by bus types. The toplevel implementation is now inline. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
201 lines
5.5 KiB
C
201 lines
5.5 KiB
C
/*
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* Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation
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*
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* Rewrite, cleanup:
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*
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* Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation
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* Copyright (C) 2006 Olof Johansson <olof@lixom.net>
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*
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* Dynamic DMA mapping support, iSeries-specific parts.
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/types.h>
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#include <linux/dma-mapping.h>
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#include <linux/list.h>
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#include <linux/pci.h>
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#include <asm/iommu.h>
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#include <asm/tce.h>
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#include <asm/machdep.h>
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#include <asm/abs_addr.h>
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#include <asm/prom.h>
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#include <asm/pci-bridge.h>
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#include <asm/iseries/hv_call_xm.h>
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#include <asm/iseries/iommu.h>
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static void tce_build_iSeries(struct iommu_table *tbl, long index, long npages,
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unsigned long uaddr, enum dma_data_direction direction)
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{
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u64 rc;
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u64 tce, rpn;
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while (npages--) {
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rpn = virt_to_abs(uaddr) >> TCE_SHIFT;
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tce = (rpn & TCE_RPN_MASK) << TCE_RPN_SHIFT;
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if (tbl->it_type == TCE_VB) {
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/* Virtual Bus */
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tce |= TCE_VALID|TCE_ALLIO;
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if (direction != DMA_TO_DEVICE)
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tce |= TCE_VB_WRITE;
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} else {
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/* PCI Bus */
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tce |= TCE_PCI_READ; /* Read allowed */
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if (direction != DMA_TO_DEVICE)
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tce |= TCE_PCI_WRITE;
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}
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rc = HvCallXm_setTce((u64)tbl->it_index, (u64)index, tce);
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if (rc)
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panic("PCI_DMA: HvCallXm_setTce failed, Rc: 0x%lx\n",
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rc);
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index++;
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uaddr += TCE_PAGE_SIZE;
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}
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}
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static void tce_free_iSeries(struct iommu_table *tbl, long index, long npages)
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{
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u64 rc;
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while (npages--) {
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rc = HvCallXm_setTce((u64)tbl->it_index, (u64)index, 0);
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if (rc)
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panic("PCI_DMA: HvCallXm_setTce failed, Rc: 0x%lx\n",
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rc);
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index++;
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}
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}
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/*
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* Structure passed to HvCallXm_getTceTableParms
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*/
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struct iommu_table_cb {
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unsigned long itc_busno; /* Bus number for this tce table */
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unsigned long itc_start; /* Will be NULL for secondary */
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unsigned long itc_totalsize; /* Size (in pages) of whole table */
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unsigned long itc_offset; /* Index into real tce table of the
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start of our section */
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unsigned long itc_size; /* Size (in pages) of our section */
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unsigned long itc_index; /* Index of this tce table */
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unsigned short itc_maxtables; /* Max num of tables for partition */
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unsigned char itc_virtbus; /* Flag to indicate virtual bus */
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unsigned char itc_slotno; /* IOA Tce Slot Index */
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unsigned char itc_rsvd[4];
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};
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/*
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* Call Hv with the architected data structure to get TCE table info.
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* info. Put the returned data into the Linux representation of the
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* TCE table data.
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* The Hardware Tce table comes in three flavors.
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* 1. TCE table shared between Buses.
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* 2. TCE table per Bus.
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* 3. TCE Table per IOA.
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*/
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void iommu_table_getparms_iSeries(unsigned long busno,
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unsigned char slotno,
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unsigned char virtbus,
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struct iommu_table* tbl)
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{
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struct iommu_table_cb *parms;
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parms = kmalloc(sizeof(*parms), GFP_KERNEL);
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if (parms == NULL)
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panic("PCI_DMA: TCE Table Allocation failed.");
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memset(parms, 0, sizeof(*parms));
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parms->itc_busno = busno;
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parms->itc_slotno = slotno;
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parms->itc_virtbus = virtbus;
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HvCallXm_getTceTableParms(iseries_hv_addr(parms));
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if (parms->itc_size == 0)
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panic("PCI_DMA: parms->size is zero, parms is 0x%p", parms);
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/* itc_size is in pages worth of table, it_size is in # of entries */
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tbl->it_size = (parms->itc_size * TCE_PAGE_SIZE) / TCE_ENTRY_SIZE;
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tbl->it_busno = parms->itc_busno;
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tbl->it_offset = parms->itc_offset;
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tbl->it_index = parms->itc_index;
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tbl->it_blocksize = 1;
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tbl->it_type = virtbus ? TCE_VB : TCE_PCI;
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kfree(parms);
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}
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#ifdef CONFIG_PCI
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/*
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* This function compares the known tables to find an iommu_table
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* that has already been built for hardware TCEs.
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*/
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static struct iommu_table *iommu_table_find(struct iommu_table * tbl)
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{
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struct device_node *node;
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for (node = NULL; (node = of_find_all_nodes(node)); ) {
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struct pci_dn *pdn = PCI_DN(node);
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struct iommu_table *it;
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if (pdn == NULL)
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continue;
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it = pdn->iommu_table;
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if ((it != NULL) &&
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(it->it_type == TCE_PCI) &&
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(it->it_offset == tbl->it_offset) &&
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(it->it_index == tbl->it_index) &&
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(it->it_size == tbl->it_size))
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return it;
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}
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return NULL;
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}
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void iommu_devnode_init_iSeries(struct pci_dev *pdev, struct device_node *dn)
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{
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struct iommu_table *tbl;
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struct pci_dn *pdn = PCI_DN(dn);
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const u32 *lsn = get_property(dn, "linux,logical-slot-number", NULL);
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BUG_ON(lsn == NULL);
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tbl = kmalloc(sizeof(struct iommu_table), GFP_KERNEL);
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iommu_table_getparms_iSeries(pdn->busno, *lsn, 0, tbl);
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/* Look for existing tce table */
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pdn->iommu_table = iommu_table_find(tbl);
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if (pdn->iommu_table == NULL)
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pdn->iommu_table = iommu_init_table(tbl, -1);
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else
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kfree(tbl);
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pdev->dev.archdata.dma_data = pdn->iommu_table;
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}
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#endif
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void iommu_init_early_iSeries(void)
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{
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ppc_md.tce_build = tce_build_iSeries;
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ppc_md.tce_free = tce_free_iSeries;
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pci_dma_ops = &dma_iommu_ops;
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}
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