forked from luck/tmp_suning_uos_patched
69a857610a
Patch from Lennert Buytenhek On the ixdp2x00, the slave CPU is currently not allowed to reset itself for fear that it will do something 'funky' on the PCI bus. This fear is ungrounded -- the slave CPU is wired up such that a CPU reset will not cause a PCI bus reset to be done. This patch changes arch_reset() so that the slave CPU also executes the reset sequence, allowing it to reboot itself using /sbin/reboot. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
49 lines
1.2 KiB
C
49 lines
1.2 KiB
C
/*
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* linux/include/asm-arm/arch-ixp2000/system.h
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*
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* Copyright (C) 2002 Intel Corp.
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* Copyricht (C) 2003-2005 MontaVista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <asm/hardware.h>
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#include <asm/mach-types.h>
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static inline void arch_idle(void)
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{
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cpu_do_idle();
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}
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static inline void arch_reset(char mode)
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{
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local_irq_disable();
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/*
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* Reset flash banking register so that we are pointing at
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* RedBoot bank.
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*/
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if (machine_is_ixdp2401()) {
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*IXDP2X01_CPLD_FLASH_REG = ((0 >> IXDP2X01_FLASH_WINDOW_BITS)
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| IXDP2X01_CPLD_FLASH_INTERN);
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*IXDP2X01_CPLD_RESET_REG = 0xffffffff;
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}
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/*
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* On IXDP2801 we need to write this magic sequence to the CPLD
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* to cause a complete reset of the CPU and all external devices
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* and moves the flash bank register back to 0.
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*/
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if (machine_is_ixdp2801()) {
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unsigned long reset_reg = *IXDP2X01_CPLD_RESET_REG;
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reset_reg = 0x55AA0000 | (reset_reg & 0x0000FFFF);
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*IXDP2X01_CPLD_RESET_REG = reset_reg;
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mb();
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*IXDP2X01_CPLD_RESET_REG = 0x80000000;
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}
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*IXP2000_RESET0 = RSTALL;
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}
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