forked from luck/tmp_suning_uos_patched
69dfb3d4a8
The removed barrier isn't needed because writes/reads are strictly ordered and even if PMC had separate ports for writes, it wouldn't matter since the hardware logic takes into effect after triggering CPU's power-gating and at that point all CPU accesses are guaranteed to be completed. That barrier was copied from the old arch/ code during transition to the soc/ PMC driver and even that the code structure was different back then, the barrier didn't have a real useful purpose from the start. Lastly, the tegra_pmc_writel() naturally inserts wmb() because it uses writel(), and thus this change doesn't actually make any difference in terms of interacting with hardware. Hence let's remove the barrier to clean up code a tad. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
||
|---|---|---|
| .. | ||
| actions | ||
| amlogic | ||
| aspeed | ||
| atmel | ||
| bcm | ||
| dove | ||
| fsl | ||
| gemini | ||
| imx | ||
| ixp4xx | ||
| lantiq | ||
| mediatek | ||
| qcom | ||
| renesas | ||
| rockchip | ||
| samsung | ||
| sunxi | ||
| tegra | ||
| ti | ||
| ux500 | ||
| versatile | ||
| xilinx | ||
| zte | ||
| Kconfig | ||
| Makefile | ||