forked from luck/tmp_suning_uos_patched
6be35c700f
Pull networking changes from David Miller: 1) Allow to dump, monitor, and change the bridge multicast database using netlink. From Cong Wang. 2) RFC 5961 TCP blind data injection attack mitigation, from Eric Dumazet. 3) Networking user namespace support from Eric W. Biederman. 4) tuntap/virtio-net multiqueue support by Jason Wang. 5) Support for checksum offload of encapsulated packets (basically, tunneled traffic can still be checksummed by HW). From Joseph Gasparakis. 6) Allow BPF filter access to VLAN tags, from Eric Dumazet and Daniel Borkmann. 7) Bridge port parameters over netlink and BPDU blocking support from Stephen Hemminger. 8) Improve data access patterns during inet socket demux by rearranging socket layout, from Eric Dumazet. 9) TIPC protocol updates and cleanups from Ying Xue, Paul Gortmaker, and Jon Maloy. 10) Update TCP socket hash sizing to be more in line with current day realities. The existing heurstics were choosen a decade ago. From Eric Dumazet. 11) Fix races, queue bloat, and excessive wakeups in ATM and associated drivers, from Krzysztof Mazur and David Woodhouse. 12) Support DOVE (Distributed Overlay Virtual Ethernet) extensions in VXLAN driver, from David Stevens. 13) Add "oops_only" mode to netconsole, from Amerigo Wang. 14) Support set and query of VEB/VEPA bridge mode via PF_BRIDGE, also allow DCB netlink to work on namespaces other than the initial namespace. From John Fastabend. 15) Support PTP in the Tigon3 driver, from Matt Carlson. 16) tun/vhost zero copy fixes and improvements, plus turn it on by default, from Michael S. Tsirkin. 17) Support per-association statistics in SCTP, from Michele Baldessari. And many, many, driver updates, cleanups, and improvements. Too numerous to mention individually. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1722 commits) net/mlx4_en: Add support for destination MAC in steering rules net/mlx4_en: Use generic etherdevice.h functions. net: ethtool: Add destination MAC address to flow steering API bridge: add support of adding and deleting mdb entries bridge: notify mdb changes via netlink ndisc: Unexport ndisc_{build,send}_skb(). uapi: add missing netconf.h to export list pkt_sched: avoid requeues if possible solos-pci: fix double-free of TX skb in DMA mode bnx2: Fix accidental reversions. bna: Driver Version Updated to 3.1.2.1 bna: Firmware update bna: Add RX State bna: Rx Page Based Allocation bna: TX Intr Coalescing Fix bna: Tx and Rx Optimizations bna: Code Cleanup and Enhancements ath9k: check pdata variable before dereferencing it ath5k: RX timestamp is reported at end of frame ath9k_htc: RX timestamp is reported at end of frame ...
390 lines
8.3 KiB
Plaintext
390 lines
8.3 KiB
Plaintext
/*
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* Device Tree Source for AM33XX SoC
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*
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/include/ "skeleton.dtsi"
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/ {
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compatible = "ti,am33xx";
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interrupt-parent = <&intc>;
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aliases {
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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serial3 = &uart4;
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serial4 = &uart5;
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serial5 = &uart6;
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};
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cpus {
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cpu@0 {
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compatible = "arm,cortex-a8";
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/*
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* To consider voltage drop between PMIC and SoC,
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* tolerance value is reduced to 2% from 4% and
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* voltage value is increased as a precaution.
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*/
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operating-points = <
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/* kHz uV */
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720000 1285000
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600000 1225000
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500000 1125000
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275000 1125000
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>;
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voltage-tolerance = <2>; /* 2 percentage */
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clock-latency = <300000>; /* From omap-cpufreq driver */
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};
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};
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/*
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* The soc node represents the soc top level view. It is uses for IPs
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* that are not memory mapped in the MPU view or for the MPU itself.
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*/
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soc {
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compatible = "ti,omap-infra";
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mpu {
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compatible = "ti,omap3-mpu";
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ti,hwmods = "mpu";
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};
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};
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am33xx_pinmux: pinmux@44e10800 {
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compatible = "pinctrl-single";
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reg = <0x44e10800 0x0238>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-single,register-width = <32>;
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pinctrl-single,function-mask = <0x7f>;
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};
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/*
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* XXX: Use a flat representation of the AM33XX interconnect.
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* The real AM33XX interconnect network is quite complex.Since
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* that will not bring real advantage to represent that in DT
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* for the moment, just use a fake OCP bus entry to represent
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* the whole bus hierarchy.
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*/
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ocp {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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ti,hwmods = "l3_main";
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intc: interrupt-controller@48200000 {
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compatible = "ti,omap2-intc";
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interrupt-controller;
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#interrupt-cells = <1>;
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ti,intc-size = <128>;
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reg = <0x48200000 0x1000>;
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};
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gpio1: gpio@44e07000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio1";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x44e07000 0x1000>;
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interrupts = <96>;
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};
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gpio2: gpio@4804c000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio2";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x4804c000 0x1000>;
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interrupts = <98>;
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};
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gpio3: gpio@481ac000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio3";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x481ac000 0x1000>;
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interrupts = <32>;
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};
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gpio4: gpio@481ae000 {
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compatible = "ti,omap4-gpio";
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ti,hwmods = "gpio4";
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x481ae000 0x1000>;
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interrupts = <62>;
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};
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uart1: serial@44e09000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart1";
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clock-frequency = <48000000>;
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reg = <0x44e09000 0x2000>;
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interrupts = <72>;
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status = "disabled";
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};
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uart2: serial@48022000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart2";
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clock-frequency = <48000000>;
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reg = <0x48022000 0x2000>;
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interrupts = <73>;
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status = "disabled";
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};
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uart3: serial@48024000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart3";
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clock-frequency = <48000000>;
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reg = <0x48024000 0x2000>;
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interrupts = <74>;
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status = "disabled";
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};
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uart4: serial@481a6000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart4";
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clock-frequency = <48000000>;
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reg = <0x481a6000 0x2000>;
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interrupts = <44>;
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status = "disabled";
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};
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uart5: serial@481a8000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart5";
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clock-frequency = <48000000>;
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reg = <0x481a8000 0x2000>;
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interrupts = <45>;
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status = "disabled";
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};
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uart6: serial@481aa000 {
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compatible = "ti,omap3-uart";
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ti,hwmods = "uart6";
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clock-frequency = <48000000>;
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reg = <0x481aa000 0x2000>;
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interrupts = <46>;
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status = "disabled";
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};
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i2c1: i2c@44e0b000 {
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compatible = "ti,omap4-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "i2c1";
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reg = <0x44e0b000 0x1000>;
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interrupts = <70>;
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status = "disabled";
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};
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i2c2: i2c@4802a000 {
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compatible = "ti,omap4-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "i2c2";
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reg = <0x4802a000 0x1000>;
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interrupts = <71>;
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status = "disabled";
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};
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i2c3: i2c@4819c000 {
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compatible = "ti,omap4-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "i2c3";
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reg = <0x4819c000 0x1000>;
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interrupts = <30>;
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status = "disabled";
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};
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wdt2: wdt@44e35000 {
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compatible = "ti,omap3-wdt";
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ti,hwmods = "wd_timer2";
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reg = <0x44e35000 0x1000>;
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interrupts = <91>;
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};
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dcan0: d_can@481cc000 {
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compatible = "bosch,d_can";
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ti,hwmods = "d_can0";
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reg = <0x481cc000 0x2000>;
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interrupts = <52>;
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status = "disabled";
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};
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dcan1: d_can@481d0000 {
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compatible = "bosch,d_can";
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ti,hwmods = "d_can1";
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reg = <0x481d0000 0x2000>;
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interrupts = <55>;
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status = "disabled";
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};
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timer1: timer@44e31000 {
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compatible = "ti,omap2-timer";
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reg = <0x44e31000 0x400>;
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interrupts = <67>;
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ti,hwmods = "timer1";
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ti,timer-alwon;
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};
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timer2: timer@48040000 {
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compatible = "ti,omap2-timer";
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reg = <0x48040000 0x400>;
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interrupts = <68>;
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ti,hwmods = "timer2";
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};
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timer3: timer@48042000 {
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compatible = "ti,omap2-timer";
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reg = <0x48042000 0x400>;
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interrupts = <69>;
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ti,hwmods = "timer3";
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};
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timer4: timer@48044000 {
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compatible = "ti,omap2-timer";
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reg = <0x48044000 0x400>;
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interrupts = <92>;
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ti,hwmods = "timer4";
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ti,timer-pwm;
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};
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timer5: timer@48046000 {
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compatible = "ti,omap2-timer";
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reg = <0x48046000 0x400>;
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interrupts = <93>;
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ti,hwmods = "timer5";
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ti,timer-pwm;
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};
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timer6: timer@48048000 {
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compatible = "ti,omap2-timer";
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reg = <0x48048000 0x400>;
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interrupts = <94>;
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ti,hwmods = "timer6";
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ti,timer-pwm;
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};
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timer7: timer@4804a000 {
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compatible = "ti,omap2-timer";
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reg = <0x4804a000 0x400>;
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interrupts = <95>;
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ti,hwmods = "timer7";
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ti,timer-pwm;
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};
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rtc@44e3e000 {
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compatible = "ti,da830-rtc";
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reg = <0x44e3e000 0x1000>;
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interrupts = <75
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76>;
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ti,hwmods = "rtc";
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};
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spi0: spi@48030000 {
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compatible = "ti,omap4-mcspi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x48030000 0x400>;
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interrupt = <65>;
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ti,spi-num-cs = <2>;
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ti,hwmods = "spi0";
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status = "disabled";
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};
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spi1: spi@481a0000 {
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compatible = "ti,omap4-mcspi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x481a0000 0x400>;
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interrupt = <125>;
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ti,spi-num-cs = <2>;
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ti,hwmods = "spi1";
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status = "disabled";
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};
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usb@47400000 {
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compatible = "ti,musb-am33xx";
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reg = <0x47400000 0x1000 /* usbss */
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0x47401000 0x800 /* musb instance 0 */
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0x47401800 0x800>; /* musb instance 1 */
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interrupts = <17 /* usbss */
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18 /* musb instance 0 */
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19>; /* musb instance 1 */
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multipoint = <1>;
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num-eps = <16>;
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ram-bits = <12>;
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port0-mode = <3>;
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port1-mode = <3>;
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power = <250>;
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ti,hwmods = "usb_otg_hs";
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};
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mac: ethernet@4a100000 {
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compatible = "ti,cpsw";
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ti,hwmods = "cpgmac0";
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cpdma_channels = <8>;
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ale_entries = <1024>;
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bd_ram_size = <0x2000>;
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no_bd_ram = <0>;
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rx_descs = <64>;
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mac_control = <0x20>;
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slaves = <2>;
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cpts_active_slave = <0>;
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cpts_clock_mult = <0x80000000>;
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cpts_clock_shift = <29>;
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reg = <0x4a100000 0x800
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0x4a101200 0x100>;
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&intc>;
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/*
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* c0_rx_thresh_pend
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* c0_rx_pend
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* c0_tx_pend
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* c0_misc_pend
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*/
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interrupts = <40 41 42 43>;
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ranges;
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davinci_mdio: mdio@4a101000 {
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compatible = "ti,davinci_mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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ti,hwmods = "davinci_mdio";
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bus_freq = <1000000>;
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reg = <0x4a101000 0x100>;
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};
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cpsw_emac0: slave@4a100200 {
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/* Filled in by U-Boot */
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mac-address = [ 00 00 00 00 00 00 ];
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};
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cpsw_emac1: slave@4a100300 {
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/* Filled in by U-Boot */
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mac-address = [ 00 00 00 00 00 00 ];
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};
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};
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};
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};
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