kernel_optimize_test/arch/mips/cavium-octeon
David Daney cd847b7857 MIPS: Octeon: Use lockless interrupt controller operations when possible.
Some newer Octeon chips have registers that allow lockless operation of
the interrupt controller.  Take advantage of them.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:07 +01:00
..
executive
csrc-octeon.c
dma-octeon.c
flash_setup.c
Kconfig
Makefile
octeon_boot.h
octeon-irq.c
octeon-memcpy.S
octeon-platform.c
serial.c
setup.c
smp.c