forked from luck/tmp_suning_uos_patched
0cd61b68c3
Untested, but this should fix up the bulk of the totally mechanical issues, and should make the actual detail fixing easier. Signed-off-by: Linus Torvalds <torvalds@osdl.org>
94 lines
2.1 KiB
C
94 lines
2.1 KiB
C
/* arch/arm/mach-lh7a40x/irq-kev7a400.c
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*
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* Copyright (C) 2004 Coastal Environmental Systems
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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*/
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <asm/irq.h>
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#include <asm/mach/irq.h>
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#include <asm/mach/hardware.h>
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#include <asm/mach/irqs.h>
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#include "common.h"
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/* KEV7a400 CPLD IRQ handling */
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static u16 CPLD_IRQ_mask; /* Mask for CPLD IRQs, 1 == unmasked */
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static void
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lh7a400_ack_cpld_irq (u32 irq)
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{
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CPLD_CL_INT = 1 << (irq - IRQ_KEV7A400_CPLD);
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}
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static void
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lh7a400_mask_cpld_irq (u32 irq)
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{
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CPLD_IRQ_mask &= ~(1 << (irq - IRQ_KEV7A400_CPLD));
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CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask;
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}
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static void
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lh7a400_unmask_cpld_irq (u32 irq)
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{
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CPLD_IRQ_mask |= 1 << (irq - IRQ_KEV7A400_CPLD);
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CPLD_WR_PB_INT_MASK = CPLD_IRQ_mask;
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}
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static struct
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irq_chip lh7a400_cpld_chip = {
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.name = "CPLD",
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.ack = lh7a400_ack_cpld_irq,
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.mask = lh7a400_mask_cpld_irq,
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.unmask = lh7a400_unmask_cpld_irq,
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};
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static void
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lh7a400_cpld_handler (unsigned int irq, struct irqdesc *desc)
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{
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u32 mask = CPLD_LATCHED_INTS;
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irq = IRQ_KEV_7A400_CPLD;
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for (; mask; mask >>= 1, ++irq) {
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if (mask & 1)
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desc[irq].handle (irq, desc);
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}
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}
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/* IRQ initialization */
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void __init
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lh7a400_init_board_irq (void)
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{
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int irq;
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for (irq = IRQ_KEV7A400_CPLD;
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irq < IRQ_KEV7A400_CPLD + NR_IRQ_KEV7A400_CPLD; ++irq) {
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set_irq_chip (irq, &lh7a400_cpld_chip);
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set_irq_handler (irq, do_edge_IRQ);
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set_irq_flags (irq, IRQF_VALID);
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}
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set_irq_chained_handler (IRQ_CPLD, kev7a400_cpld_handler);
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/* Clear all CPLD interrupts */
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CPLD_CL_INT = 0xff; /* CPLD_INTR_MMC_CD | CPLD_INTR_ETH_INT; */
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/* *** FIXME CF enabled in ide-probe.c */
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GPIO_GPIOINTEN = 0; /* Disable all GPIO interrupts */
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barrier();
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GPIO_INTTYPE1
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= (GPIO_INTR_PCC1_CD | GPIO_INTR_PCC1_CD); /* Edge trig. */
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GPIO_INTTYPE2 = 0; /* Falling edge & low-level */
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GPIO_GPIOFEOI = 0xff; /* Clear all GPIO interrupts */
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GPIO_GPIOINTEN = 0xff; /* Enable all GPIO interrupts */
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init_FIQ();
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}
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