AcoSail/kernel_optimize_test
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6c70b6fc7b
kernel_optimize_test/arch/sparc64/lib
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David S. Miller 6c70b6fc7b [SPARC64]: Do not assume sun4v chips have load-twin/store-init support. 
Check the cpu type in the OBP device tree before committing to
using the optimized Niagara memcpy and memset implementation.

If we don't recognize the cpu type, use a completely generic
version.

Signed-off-by: David S. Miller <davem@davemloft.net>
2007-08-08 17:33:45 -07:00
..
atomic.S Remove obsolete #include <linux/config.h> 2006-06-30 19:25:36 +02:00
bitops.S Remove obsolete #include <linux/config.h> 2006-06-30 19:25:36 +02:00
bzero.S [SPARC64]: __bzero_noasi --> __clear_user 2006-03-20 01:13:28 -08:00
checksum.S [SPARC64]: Fix missing fold at end of checksums. 2006-06-04 21:32:01 -07:00
clear_page.S [SPARC64]: Deal with PTE layout differences in SUN4V. 2006-03-20 01:12:25 -08:00
copy_in_user.S [SPARC64]: Mark __ex_table section correctly. 2006-03-04 23:23:56 -08:00
copy_page.S [SPARC64]: Deal with PTE layout differences in SUN4V. 2006-03-20 01:12:25 -08:00
csum_copy_from_user.S [SPARC64]: Mark __ex_table section correctly. 2006-03-04 23:23:56 -08:00
csum_copy_to_user.S [SPARC64]: Mark __ex_table section correctly. 2006-03-04 23:23:56 -08:00
csum_copy.S [SPARC64]: Fix missing fold at end of checksums. 2006-06-04 21:32:01 -07:00
GENbzero.S [SPARC64]: Do not assume sun4v chips have load-twin/store-init support. 2007-08-08 17:33:45 -07:00
GENcopy_from_user.S [SPARC64]: Do not assume sun4v chips have load-twin/store-init support. 2007-08-08 17:33:45 -07:00
GENcopy_to_user.S [SPARC64]: Do not assume sun4v chips have load-twin/store-init support. 2007-08-08 17:33:45 -07:00
GENmemcpy.S [SPARC64]: Do not assume sun4v chips have load-twin/store-init support. 2007-08-08 17:33:45 -07:00
GENpage.S [SPARC64]: Do not assume sun4v chips have load-twin/store-init support. 2007-08-08 17:33:45 -07:00
GENpatch.S [SPARC64]: Do not assume sun4v chips have load-twin/store-init support. 2007-08-08 17:33:45 -07:00
iomap.c
ipcsum.S
Makefile [SPARC64]: Do not assume sun4v chips have load-twin/store-init support. 2007-08-08 17:33:45 -07:00
mcount.S Remove obsolete #include <linux/config.h> 2006-06-30 19:25:36 +02:00
memcmp.S
memmove.S
memscan.S
NGbzero.S [SPARC64]: store-init needs trailing membar. 2007-03-19 13:27:33 -07:00
NGcopy_from_user.S [SPARC64]: Niagara optimized memcpy() and copy_{to,from}_user(). 2006-03-20 01:11:42 -08:00
NGcopy_to_user.S [SPARC64]: Fix some Niagara memcpy() bugs. 2006-03-20 01:12:20 -08:00
NGmemcpy.S [SPARC64]: store-init needs trailing membar. 2007-03-19 13:27:33 -07:00
NGpage.S [SPARC64]: store-init needs trailing membar. 2007-03-19 13:27:33 -07:00
NGpatch.S [SPARC64]: Fix branch signedness bug in all code patching. 2006-03-20 01:12:29 -08:00
PeeCeeI.c
rwsem.S
strlen_user.S [SPARC64]: Mark __ex_table section correctly. 2006-03-04 23:23:56 -08:00
strlen.S
strncmp.S
strncpy_from_user.S [SPARC64]: Mark __ex_table section correctly. 2006-03-04 23:23:56 -08:00
U1copy_from_user.S [SPARC64]: Mark __ex_table section correctly. 2006-03-04 23:23:56 -08:00
U1copy_to_user.S [SPARC64]: Mark __ex_table section correctly. 2006-03-04 23:23:56 -08:00
U1memcpy.S
U3copy_from_user.S [SPARC64]: Mark __ex_table section correctly. 2006-03-04 23:23:56 -08:00
U3copy_to_user.S [SPARC64]: Mark __ex_table section correctly. 2006-03-04 23:23:56 -08:00
U3memcpy.S
U3patch.S [SPARC64]: Fix branch signedness bug in all code patching. 2006-03-20 01:12:29 -08:00
user_fixup.c
VISsave.S
xor.S [SPARC64]: Niagara optimized XOR functions for RAID. 2006-03-20 01:14:03 -08:00