forked from luck/tmp_suning_uos_patched
c80ae7ca37
This replaces the SHA-512 NEON module with the faster and more versatile implementation from the OpenSSL project. It consists of both a NEON and a generic ASM version of the core SHA-512 transform, where the NEON version reverts to the ASM version when invoked in non-process context. This patch is based on the OpenSSL upstream version b1a5d1c65208 of sha512-armv4.pl, which can be found here: https://git.openssl.org/gitweb/?p=openssl.git;h=b1a5d1c65208 Performance relative to the generic implementation (measured using tcrypt.ko mode=306 sec=1 running on a Cortex-A57 under KVM): input size block size asm neon old neon 16 16 1.39 2.54 2.21 64 16 1.32 2.33 2.09 64 64 1.38 2.53 2.19 256 16 1.31 2.28 2.06 256 64 1.38 2.54 2.25 256 256 1.40 2.77 2.39 1024 16 1.29 2.22 2.01 1024 256 1.40 2.82 2.45 1024 1024 1.41 2.93 2.53 2048 16 1.33 2.21 2.00 2048 256 1.40 2.84 2.46 2048 1024 1.41 2.96 2.55 2048 2048 1.41 2.98 2.56 4096 16 1.34 2.20 1.99 4096 256 1.40 2.84 2.46 4096 1024 1.41 2.97 2.56 4096 4096 1.41 3.01 2.58 8192 16 1.34 2.19 1.99 8192 256 1.40 2.85 2.47 8192 1024 1.41 2.98 2.56 8192 4096 1.41 2.71 2.59 8192 8192 1.51 3.51 2.69 Acked-by: Jussi Kivilinna <jussi.kivilinna@iki.fi> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
124 lines
3.9 KiB
Plaintext
124 lines
3.9 KiB
Plaintext
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menuconfig ARM_CRYPTO
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bool "ARM Accelerated Cryptographic Algorithms"
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depends on ARM
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help
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Say Y here to choose from a selection of cryptographic algorithms
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implemented using ARM specific CPU features or instructions.
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if ARM_CRYPTO
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config CRYPTO_SHA1_ARM
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tristate "SHA1 digest algorithm (ARM-asm)"
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select CRYPTO_SHA1
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select CRYPTO_HASH
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help
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SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
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using optimized ARM assembler.
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config CRYPTO_SHA1_ARM_NEON
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tristate "SHA1 digest algorithm (ARM NEON)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_SHA1_ARM
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select CRYPTO_SHA1
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select CRYPTO_HASH
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help
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SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
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using optimized ARM NEON assembly, when NEON instructions are
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available.
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config CRYPTO_SHA1_ARM_CE
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tristate "SHA1 digest algorithm (ARM v8 Crypto Extensions)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_SHA1_ARM
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select CRYPTO_HASH
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help
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SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
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using special ARMv8 Crypto Extensions.
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config CRYPTO_SHA2_ARM_CE
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tristate "SHA-224/256 digest algorithm (ARM v8 Crypto Extensions)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_SHA256_ARM
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select CRYPTO_HASH
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help
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SHA-256 secure hash standard (DFIPS 180-2) implemented
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using special ARMv8 Crypto Extensions.
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config CRYPTO_SHA256_ARM
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tristate "SHA-224/256 digest algorithm (ARM-asm and NEON)"
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select CRYPTO_HASH
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depends on !CPU_V7M
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help
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SHA-256 secure hash standard (DFIPS 180-2) implemented
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using optimized ARM assembler and NEON, when available.
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config CRYPTO_SHA512_ARM
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tristate "SHA-384/512 digest algorithm (ARM-asm and NEON)"
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select CRYPTO_HASH
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depends on !CPU_V7M
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help
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SHA-512 secure hash standard (DFIPS 180-2) implemented
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using optimized ARM assembler and NEON, when available.
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config CRYPTO_AES_ARM
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tristate "AES cipher algorithms (ARM-asm)"
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depends on ARM
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select CRYPTO_ALGAPI
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select CRYPTO_AES
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help
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Use optimized AES assembler routines for ARM platforms.
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AES cipher algorithms (FIPS-197). AES uses the Rijndael
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algorithm.
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Rijndael appears to be consistently a very good performer in
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both hardware and software across a wide range of computing
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environments regardless of its use in feedback or non-feedback
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modes. Its key setup time is excellent, and its key agility is
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good. Rijndael's very low memory requirements make it very well
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suited for restricted-space environments, in which it also
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demonstrates excellent performance. Rijndael's operations are
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among the easiest to defend against power and timing attacks.
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The AES specifies three key sizes: 128, 192 and 256 bits
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See <http://csrc.nist.gov/encryption/aes/> for more information.
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config CRYPTO_AES_ARM_BS
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tristate "Bit sliced AES using NEON instructions"
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depends on KERNEL_MODE_NEON
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select CRYPTO_ALGAPI
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select CRYPTO_AES_ARM
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select CRYPTO_ABLK_HELPER
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help
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Use a faster and more secure NEON based implementation of AES in CBC,
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CTR and XTS modes
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Bit sliced AES gives around 45% speedup on Cortex-A15 for CTR mode
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and for XTS mode encryption, CBC and XTS mode decryption speedup is
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around 25%. (CBC encryption speed is not affected by this driver.)
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This implementation does not rely on any lookup tables so it is
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believed to be invulnerable to cache timing attacks.
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config CRYPTO_AES_ARM_CE
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tristate "Accelerated AES using ARMv8 Crypto Extensions"
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depends on KERNEL_MODE_NEON
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select CRYPTO_ALGAPI
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select CRYPTO_ABLK_HELPER
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help
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Use an implementation of AES in CBC, CTR and XTS modes that uses
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ARMv8 Crypto Extensions
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config CRYPTO_GHASH_ARM_CE
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tristate "PMULL-accelerated GHASH using ARMv8 Crypto Extensions"
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depends on KERNEL_MODE_NEON
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select CRYPTO_HASH
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select CRYPTO_CRYPTD
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help
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Use an implementation of GHASH (used by the GCM AEAD chaining mode)
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that uses the 64x64 to 128 bit polynomial multiplication (vmull.p64)
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that is part of the ARMv8 Crypto Extensions
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endif
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