forked from luck/tmp_suning_uos_patched
acf7d76827
This is a first version of support for the Cell BE "Reliability, Availability and Serviceability" features. It doesn't yet handle some of the RAS interrupts (the ones described in iic_is/iic_irr), I'm still working on a proper way to expose these. They are essentially a cascaded controller by themselves (sic !) though I may just handle them locally to the iic driver. I need also to sync with David Erb on the way he hooked in the performance monitor interrupt. So that's all for 2.6.17 and I'll do more work on that with my rework of the powerpc interrupt layer that I'm hacking on at the moment. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
168 lines
4.0 KiB
C
168 lines
4.0 KiB
C
/*
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* CBE Pervasive Monitor and Debug
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*
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* (C) Copyright IBM Corporation 2005
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*
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* Authors: Maximino Aguilar (maguilar@us.ibm.com)
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* Michael N. Day (mnday@us.ibm.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#undef DEBUG
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#include <linux/config.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/percpu.h>
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#include <linux/types.h>
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#include <linux/kallsyms.h>
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#include <asm/io.h>
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#include <asm/machdep.h>
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#include <asm/prom.h>
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#include <asm/pgtable.h>
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#include <asm/reg.h>
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#include "pervasive.h"
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#include "cbe_regs.h"
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static DEFINE_SPINLOCK(cbe_pervasive_lock);
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static void __init cbe_enable_pause_zero(void)
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{
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unsigned long thread_switch_control;
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unsigned long temp_register;
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struct cbe_pmd_regs __iomem *pregs;
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spin_lock_irq(&cbe_pervasive_lock);
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pregs = cbe_get_cpu_pmd_regs(smp_processor_id());
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if (pregs == NULL)
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goto out;
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pr_debug("Power Management: CPU %d\n", smp_processor_id());
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/* Enable Pause(0) control bit */
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temp_register = in_be64(&pregs->pm_control);
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out_be64(&pregs->pm_control,
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temp_register | CBE_PMD_PAUSE_ZERO_CONTROL);
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/* Enable DEC and EE interrupt request */
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thread_switch_control = mfspr(SPRN_TSC_CELL);
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thread_switch_control |= TSC_CELL_EE_ENABLE | TSC_CELL_EE_BOOST;
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switch ((mfspr(SPRN_CTRLF) & CTRL_CT)) {
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case CTRL_CT0:
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thread_switch_control |= TSC_CELL_DEC_ENABLE_0;
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break;
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case CTRL_CT1:
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thread_switch_control |= TSC_CELL_DEC_ENABLE_1;
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break;
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default:
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printk(KERN_WARNING "%s: unknown configuration\n",
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__FUNCTION__);
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break;
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}
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mtspr(SPRN_TSC_CELL, thread_switch_control);
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out:
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spin_unlock_irq(&cbe_pervasive_lock);
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}
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static void cbe_idle(void)
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{
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unsigned long ctrl;
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/* Why do we do that on every idle ? Couldn't that be done once for
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* all or do we lose the state some way ? Also, the pm_control
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* register setting, that can't be set once at boot ? We really want
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* to move that away in order to implement a simple powersave
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*/
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cbe_enable_pause_zero();
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while (1) {
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if (!need_resched()) {
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local_irq_disable();
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while (!need_resched()) {
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/* go into low thread priority */
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HMT_low();
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/*
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* atomically disable thread execution
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* and runlatch.
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* External and Decrementer exceptions
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* are still handled when the thread
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* is disabled but now enter in
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* cbe_system_reset_exception()
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*/
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ctrl = mfspr(SPRN_CTRLF);
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ctrl &= ~(CTRL_RUNLATCH | CTRL_TE);
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mtspr(SPRN_CTRLT, ctrl);
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}
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/* restore thread prio */
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HMT_medium();
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local_irq_enable();
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}
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/*
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* turn runlatch on again before scheduling the
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* process we just woke up
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*/
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ppc64_runlatch_on();
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preempt_enable_no_resched();
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schedule();
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preempt_disable();
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}
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}
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static int cbe_system_reset_exception(struct pt_regs *regs)
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{
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switch (regs->msr & SRR1_WAKEMASK) {
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case SRR1_WAKEEE:
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do_IRQ(regs);
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break;
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case SRR1_WAKEDEC:
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timer_interrupt(regs);
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break;
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case SRR1_WAKEMT:
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break;
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#ifdef CONFIG_CBE_RAS
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case SRR1_WAKESYSERR:
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cbe_system_error_exception(regs);
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break;
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case SRR1_WAKETHERM:
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cbe_thermal_exception(regs);
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break;
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#endif /* CONFIG_CBE_RAS */
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default:
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/* do system reset */
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return 0;
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}
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/* everything handled */
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return 1;
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}
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void __init cbe_pervasive_init(void)
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{
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if (!cpu_has_feature(CPU_FTR_PAUSE_ZERO))
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return;
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ppc_md.idle_loop = cbe_idle;
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ppc_md.system_reset_exception = cbe_system_reset_exception;
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}
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