forked from luck/tmp_suning_uos_patched
76e4f660d9
Experimental CPU hotplug patch for x86_64 ----------------------------------------- This supports logical CPU online and offline. - Test with maxcpus=1, and then kick other cpu's off to test if init code is all cleaned up. CONFIG_SCHED_SMT works as well. - idle threads are forked on demand from keventd threads for clean startup TBD: 1. Not tested on a real NUMA machine (tested with numa=fake=2) 2. Handle ACPI pieces for physical hotplug support. Signed-off-by: Ashok Raj <ashok.raj@intel.com> Acked-by: Andi Kleen <ak@muc.de> Acked-by: Zwane Mwaikambo <zwane@arm.linux.org.uk> Signed-off-by: Shaohua.li<shaohua.li@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
138 lines
3.1 KiB
C
138 lines
3.1 KiB
C
/*
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* linux/arch/x86_64/kernel/irq.c
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*
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* Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
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*
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* This file contains the lowest level x86_64-specific interrupt
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* entry and irq statistics code. All the remaining irq logic is
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* done by the generic kernel/irq/ code and in the
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* x86_64-specific irq controller code. (e.g. i8259.c and
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* io_apic.c.)
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*/
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#include <linux/kernel_stat.h>
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#include <linux/interrupt.h>
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#include <linux/seq_file.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <asm/uaccess.h>
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#include <asm/io_apic.h>
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atomic_t irq_err_count;
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#ifdef CONFIG_X86_IO_APIC
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#ifdef APIC_MISMATCH_DEBUG
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atomic_t irq_mis_count;
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#endif
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#endif
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/*
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* Generic, controller-independent functions:
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*/
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int show_interrupts(struct seq_file *p, void *v)
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{
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int i = *(loff_t *) v, j;
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struct irqaction * action;
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unsigned long flags;
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if (i == 0) {
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seq_printf(p, " ");
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for (j=0; j<NR_CPUS; j++)
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if (cpu_online(j))
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seq_printf(p, "CPU%d ",j);
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seq_putc(p, '\n');
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}
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if (i < NR_IRQS) {
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spin_lock_irqsave(&irq_desc[i].lock, flags);
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action = irq_desc[i].action;
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if (!action)
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goto skip;
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seq_printf(p, "%3d: ",i);
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#ifndef CONFIG_SMP
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seq_printf(p, "%10u ", kstat_irqs(i));
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#else
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for (j=0; j<NR_CPUS; j++)
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if (cpu_online(j))
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seq_printf(p, "%10u ",
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kstat_cpu(j).irqs[i]);
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#endif
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seq_printf(p, " %14s", irq_desc[i].handler->typename);
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seq_printf(p, " %s", action->name);
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for (action=action->next; action; action = action->next)
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seq_printf(p, ", %s", action->name);
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seq_putc(p, '\n');
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skip:
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spin_unlock_irqrestore(&irq_desc[i].lock, flags);
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} else if (i == NR_IRQS) {
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seq_printf(p, "NMI: ");
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for (j = 0; j < NR_CPUS; j++)
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if (cpu_online(j))
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seq_printf(p, "%10u ", cpu_pda[j].__nmi_count);
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seq_putc(p, '\n');
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#ifdef CONFIG_X86_LOCAL_APIC
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seq_printf(p, "LOC: ");
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for (j = 0; j < NR_CPUS; j++)
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if (cpu_online(j))
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seq_printf(p, "%10u ", cpu_pda[j].apic_timer_irqs);
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seq_putc(p, '\n');
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#endif
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seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
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#ifdef CONFIG_X86_IO_APIC
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#ifdef APIC_MISMATCH_DEBUG
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seq_printf(p, "MIS: %10u\n", atomic_read(&irq_mis_count));
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#endif
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#endif
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}
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return 0;
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}
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/*
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* do_IRQ handles all normal device IRQ's (the special
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* SMP cross-CPU interrupts have their own specific
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* handlers).
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*/
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asmlinkage unsigned int do_IRQ(struct pt_regs *regs)
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{
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/* high bits used in ret_from_ code */
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unsigned irq = regs->orig_rax & 0xff;
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irq_enter();
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BUG_ON(irq > 256);
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__do_IRQ(irq, regs);
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irq_exit();
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return 1;
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}
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#ifdef CONFIG_HOTPLUG_CPU
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void fixup_irqs(cpumask_t map)
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{
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unsigned int irq;
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static int warned;
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for (irq = 0; irq < NR_IRQS; irq++) {
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cpumask_t mask;
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if (irq == 2)
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continue;
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cpus_and(mask, irq_affinity[irq], map);
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if (any_online_cpu(mask) == NR_CPUS) {
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printk("Breaking affinity for irq %i\n", irq);
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mask = map;
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}
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if (irq_desc[irq].handler->set_affinity)
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irq_desc[irq].handler->set_affinity(irq, mask);
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else if (irq_desc[irq].action && !(warned++))
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printk("Cannot set affinity for irq %i\n", irq);
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}
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/* That doesn't seem sufficient. Give it 1ms. */
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local_irq_enable();
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mdelay(1);
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local_irq_disable();
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}
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#endif
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