forked from luck/tmp_suning_uos_patched
6473d160b4
I noticed that many source files include <linux/pci.h> while they do not appear to need it. Here is an attempt to clean it all up. In order to find all possibly affected files, I searched for all files including <linux/pci.h> but without any other occurence of "pci" or "PCI". I removed the include statement from all of these, then I compiled an allmodconfig kernel on both i386 and x86_64 and fixed the false positives manually. My tests covered 66% of the affected files, so there could be false positives remaining. Untested files are: arch/alpha/kernel/err_common.c arch/alpha/kernel/err_ev6.c arch/alpha/kernel/err_ev7.c arch/ia64/sn/kernel/huberror.c arch/ia64/sn/kernel/xpnet.c arch/m68knommu/kernel/dma.c arch/mips/lib/iomap.c arch/powerpc/platforms/pseries/ras.c arch/ppc/8260_io/enet.c arch/ppc/8260_io/fcc_enet.c arch/ppc/8xx_io/enet.c arch/ppc/syslib/ppc4xx_sgdma.c arch/sh64/mach-cayman/iomap.c arch/xtensa/kernel/xtensa_ksyms.c arch/xtensa/platform-iss/setup.c drivers/i2c/busses/i2c-at91.c drivers/i2c/busses/i2c-mpc.c drivers/media/video/saa711x.c drivers/misc/hdpuftrs/hdpu_cpustate.c drivers/misc/hdpuftrs/hdpu_nexus.c drivers/net/au1000_eth.c drivers/net/fec_8xx/fec_main.c drivers/net/fec_8xx/fec_mii.c drivers/net/fs_enet/fs_enet-main.c drivers/net/fs_enet/mac-fcc.c drivers/net/fs_enet/mac-fec.c drivers/net/fs_enet/mac-scc.c drivers/net/fs_enet/mii-bitbang.c drivers/net/fs_enet/mii-fec.c drivers/net/ibm_emac/ibm_emac_core.c drivers/net/lasi_82596.c drivers/parisc/hppb.c drivers/sbus/sbus.c drivers/video/g364fb.c drivers/video/platinumfb.c drivers/video/stifb.c drivers/video/valkyriefb.c include/asm-arm/arch-ixp4xx/dma.h sound/oss/au1550_ac97.c I would welcome test reports for these files. I am fine with removing the untested files from the patch if the general opinion is that these changes aren't safe. The tested part would still be nice to have. Note that this patch depends on another header fixup patch I submitted to LKML yesterday: [PATCH] scatterlist.h needs types.h http://lkml.org/lkml/2007/3/01/141 Signed-off-by: Jean Delvare <khali@linux-fr.org> Cc: Badari Pulavarty <pbadari@us.ibm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
982 lines
26 KiB
C
982 lines
26 KiB
C
/* $Id: netjet.c,v 1.29.2.4 2004/02/11 13:21:34 keil Exp $
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*
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* low level stuff for Traverse Technologie NETJet ISDN cards
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*
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* Author Karsten Keil
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* Copyright by Karsten Keil <keil@isdn4linux.de>
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*
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* This software may be used and distributed according to the terms
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* of the GNU General Public License, incorporated herein by reference.
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*
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* Thanks to Traverse Technologies Australia for documents and information
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*
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* 16-Apr-2002 - led code added - Guy Ellis (guy@traverse.com.au)
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*
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*/
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#include <linux/init.h>
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#include "hisax.h"
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#include "isac.h"
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#include "hscx.h"
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#include "isdnl1.h"
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#include <linux/interrupt.h>
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#include <linux/ppp_defs.h>
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#include <asm/io.h>
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#include "netjet.h"
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/* Interface functions */
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u_char
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NETjet_ReadIC(struct IsdnCardState *cs, u_char offset)
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{
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u_char ret;
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cs->hw.njet.auxd &= 0xfc;
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cs->hw.njet.auxd |= (offset>>4) & 3;
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byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
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ret = bytein(cs->hw.njet.isac + ((offset & 0xf)<<2));
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return(ret);
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}
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void
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NETjet_WriteIC(struct IsdnCardState *cs, u_char offset, u_char value)
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{
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cs->hw.njet.auxd &= 0xfc;
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cs->hw.njet.auxd |= (offset>>4) & 3;
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byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
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byteout(cs->hw.njet.isac + ((offset & 0xf)<<2), value);
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}
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void
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NETjet_ReadICfifo(struct IsdnCardState *cs, u_char *data, int size)
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{
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cs->hw.njet.auxd &= 0xfc;
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byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
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insb(cs->hw.njet.isac, data, size);
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}
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void
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NETjet_WriteICfifo(struct IsdnCardState *cs, u_char *data, int size)
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{
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cs->hw.njet.auxd &= 0xfc;
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byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
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outsb(cs->hw.njet.isac, data, size);
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}
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static void fill_mem(struct BCState *bcs, u_int *pos, u_int cnt, int chan, u_char fill)
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{
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u_int mask=0x000000ff, val = 0, *p=pos;
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u_int i;
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val |= fill;
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if (chan) {
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val <<= 8;
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mask <<= 8;
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}
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mask ^= 0xffffffff;
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for (i=0; i<cnt; i++) {
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*p &= mask;
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*p++ |= val;
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if (p > bcs->hw.tiger.s_end)
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p = bcs->hw.tiger.send;
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}
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}
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static void
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mode_tiger(struct BCState *bcs, int mode, int bc)
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{
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struct IsdnCardState *cs = bcs->cs;
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u_char led;
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if (cs->debug & L1_DEB_HSCX)
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debugl1(cs, "Tiger mode %d bchan %d/%d",
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mode, bc, bcs->channel);
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bcs->mode = mode;
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bcs->channel = bc;
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switch (mode) {
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case (L1_MODE_NULL):
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fill_mem(bcs, bcs->hw.tiger.send,
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NETJET_DMA_TXSIZE, bc, 0xff);
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if (cs->debug & L1_DEB_HSCX)
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debugl1(cs, "Tiger stat rec %d/%d send %d",
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bcs->hw.tiger.r_tot, bcs->hw.tiger.r_err,
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bcs->hw.tiger.s_tot);
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if ((cs->bcs[0].mode == L1_MODE_NULL) &&
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(cs->bcs[1].mode == L1_MODE_NULL)) {
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cs->hw.njet.dmactrl = 0;
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byteout(cs->hw.njet.base + NETJET_DMACTRL,
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cs->hw.njet.dmactrl);
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byteout(cs->hw.njet.base + NETJET_IRQMASK0, 0);
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}
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if (cs->typ == ISDN_CTYPE_NETJET_S)
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{
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// led off
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led = bc & 0x01;
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led = 0x01 << (6 + led); // convert to mask
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led = ~led;
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cs->hw.njet.auxd &= led;
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byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
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}
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break;
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case (L1_MODE_TRANS):
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break;
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case (L1_MODE_HDLC_56K):
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case (L1_MODE_HDLC):
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fill_mem(bcs, bcs->hw.tiger.send,
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NETJET_DMA_TXSIZE, bc, 0xff);
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bcs->hw.tiger.r_state = HDLC_ZERO_SEARCH;
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bcs->hw.tiger.r_tot = 0;
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bcs->hw.tiger.r_bitcnt = 0;
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bcs->hw.tiger.r_one = 0;
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bcs->hw.tiger.r_err = 0;
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bcs->hw.tiger.s_tot = 0;
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if (! cs->hw.njet.dmactrl) {
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fill_mem(bcs, bcs->hw.tiger.send,
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NETJET_DMA_TXSIZE, !bc, 0xff);
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cs->hw.njet.dmactrl = 1;
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byteout(cs->hw.njet.base + NETJET_DMACTRL,
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cs->hw.njet.dmactrl);
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byteout(cs->hw.njet.base + NETJET_IRQMASK0, 0x0f);
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/* was 0x3f now 0x0f for TJ300 and TJ320 GE 13/07/00 */
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}
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bcs->hw.tiger.sendp = bcs->hw.tiger.send;
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bcs->hw.tiger.free = NETJET_DMA_TXSIZE;
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test_and_set_bit(BC_FLG_EMPTY, &bcs->Flag);
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if (cs->typ == ISDN_CTYPE_NETJET_S)
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{
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// led on
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led = bc & 0x01;
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led = 0x01 << (6 + led); // convert to mask
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cs->hw.njet.auxd |= led;
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byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
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}
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break;
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}
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if (cs->debug & L1_DEB_HSCX)
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debugl1(cs, "tiger: set %x %x %x %x/%x pulse=%d",
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bytein(cs->hw.njet.base + NETJET_DMACTRL),
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bytein(cs->hw.njet.base + NETJET_IRQMASK0),
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bytein(cs->hw.njet.base + NETJET_IRQSTAT0),
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inl(cs->hw.njet.base + NETJET_DMA_READ_ADR),
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inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR),
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bytein(cs->hw.njet.base + NETJET_PULSE_CNT));
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}
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static void printframe(struct IsdnCardState *cs, u_char *buf, int count, char *s) {
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char tmp[128];
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char *t = tmp;
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int i=count,j;
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u_char *p = buf;
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t += sprintf(t, "tiger %s(%4d)", s, count);
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while (i>0) {
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if (i>16)
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j=16;
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else
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j=i;
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QuickHex(t, p, j);
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debugl1(cs, tmp);
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p += j;
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i -= j;
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t = tmp;
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t += sprintf(t, "tiger %s ", s);
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}
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}
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// macro for 64k
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#define MAKE_RAW_BYTE for (j=0; j<8; j++) { \
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bitcnt++;\
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s_val >>= 1;\
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if (val & 1) {\
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s_one++;\
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s_val |= 0x80;\
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} else {\
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s_one = 0;\
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s_val &= 0x7f;\
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}\
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if (bitcnt==8) {\
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bcs->hw.tiger.sendbuf[s_cnt++] = s_val;\
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bitcnt = 0;\
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}\
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if (s_one == 5) {\
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s_val >>= 1;\
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s_val &= 0x7f;\
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bitcnt++;\
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s_one = 0;\
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}\
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if (bitcnt==8) {\
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bcs->hw.tiger.sendbuf[s_cnt++] = s_val;\
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bitcnt = 0;\
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}\
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val >>= 1;\
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}
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static int make_raw_data(struct BCState *bcs) {
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// this make_raw is for 64k
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register u_int i,s_cnt=0;
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register u_char j;
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register u_char val;
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register u_char s_one = 0;
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register u_char s_val = 0;
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register u_char bitcnt = 0;
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u_int fcs;
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if (!bcs->tx_skb) {
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debugl1(bcs->cs, "tiger make_raw: NULL skb");
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return(1);
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}
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bcs->hw.tiger.sendbuf[s_cnt++] = HDLC_FLAG_VALUE;
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fcs = PPP_INITFCS;
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for (i=0; i<bcs->tx_skb->len; i++) {
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val = bcs->tx_skb->data[i];
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fcs = PPP_FCS (fcs, val);
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MAKE_RAW_BYTE;
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}
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fcs ^= 0xffff;
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val = fcs & 0xff;
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MAKE_RAW_BYTE;
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val = (fcs>>8) & 0xff;
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MAKE_RAW_BYTE;
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val = HDLC_FLAG_VALUE;
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for (j=0; j<8; j++) {
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bitcnt++;
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s_val >>= 1;
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if (val & 1)
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s_val |= 0x80;
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else
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s_val &= 0x7f;
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if (bitcnt==8) {
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bcs->hw.tiger.sendbuf[s_cnt++] = s_val;
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bitcnt = 0;
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}
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val >>= 1;
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}
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if (bcs->cs->debug & L1_DEB_HSCX)
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debugl1(bcs->cs,"tiger make_raw: in %ld out %d.%d",
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bcs->tx_skb->len, s_cnt, bitcnt);
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if (bitcnt) {
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while (8>bitcnt++) {
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s_val >>= 1;
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s_val |= 0x80;
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}
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bcs->hw.tiger.sendbuf[s_cnt++] = s_val;
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bcs->hw.tiger.sendbuf[s_cnt++] = 0xff; // NJ<->NJ thoughput bug fix
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}
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bcs->hw.tiger.sendcnt = s_cnt;
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bcs->tx_cnt -= bcs->tx_skb->len;
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bcs->hw.tiger.sp = bcs->hw.tiger.sendbuf;
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return(0);
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}
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// macro for 56k
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#define MAKE_RAW_BYTE_56K for (j=0; j<8; j++) { \
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bitcnt++;\
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s_val >>= 1;\
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if (val & 1) {\
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s_one++;\
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s_val |= 0x80;\
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} else {\
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s_one = 0;\
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s_val &= 0x7f;\
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}\
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if (bitcnt==7) {\
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s_val >>= 1;\
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s_val |= 0x80;\
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bcs->hw.tiger.sendbuf[s_cnt++] = s_val;\
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bitcnt = 0;\
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}\
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if (s_one == 5) {\
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s_val >>= 1;\
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s_val &= 0x7f;\
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bitcnt++;\
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s_one = 0;\
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}\
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if (bitcnt==7) {\
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s_val >>= 1;\
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s_val |= 0x80;\
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bcs->hw.tiger.sendbuf[s_cnt++] = s_val;\
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bitcnt = 0;\
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}\
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val >>= 1;\
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}
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static int make_raw_data_56k(struct BCState *bcs) {
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// this make_raw is for 56k
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register u_int i,s_cnt=0;
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register u_char j;
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register u_char val;
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register u_char s_one = 0;
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register u_char s_val = 0;
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register u_char bitcnt = 0;
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u_int fcs;
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if (!bcs->tx_skb) {
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debugl1(bcs->cs, "tiger make_raw_56k: NULL skb");
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return(1);
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}
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val = HDLC_FLAG_VALUE;
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for (j=0; j<8; j++) {
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bitcnt++;
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s_val >>= 1;
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if (val & 1)
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s_val |= 0x80;
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else
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s_val &= 0x7f;
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if (bitcnt==7) {
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s_val >>= 1;
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s_val |= 0x80;
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bcs->hw.tiger.sendbuf[s_cnt++] = s_val;
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bitcnt = 0;
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}
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val >>= 1;
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};
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fcs = PPP_INITFCS;
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for (i=0; i<bcs->tx_skb->len; i++) {
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val = bcs->tx_skb->data[i];
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fcs = PPP_FCS (fcs, val);
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MAKE_RAW_BYTE_56K;
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}
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fcs ^= 0xffff;
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val = fcs & 0xff;
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MAKE_RAW_BYTE_56K;
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val = (fcs>>8) & 0xff;
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MAKE_RAW_BYTE_56K;
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val = HDLC_FLAG_VALUE;
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for (j=0; j<8; j++) {
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bitcnt++;
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s_val >>= 1;
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if (val & 1)
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s_val |= 0x80;
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else
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s_val &= 0x7f;
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if (bitcnt==7) {
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s_val >>= 1;
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s_val |= 0x80;
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bcs->hw.tiger.sendbuf[s_cnt++] = s_val;
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bitcnt = 0;
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}
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val >>= 1;
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}
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if (bcs->cs->debug & L1_DEB_HSCX)
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debugl1(bcs->cs,"tiger make_raw_56k: in %ld out %d.%d",
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bcs->tx_skb->len, s_cnt, bitcnt);
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if (bitcnt) {
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while (8>bitcnt++) {
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s_val >>= 1;
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s_val |= 0x80;
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}
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bcs->hw.tiger.sendbuf[s_cnt++] = s_val;
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bcs->hw.tiger.sendbuf[s_cnt++] = 0xff; // NJ<->NJ thoughput bug fix
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}
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bcs->hw.tiger.sendcnt = s_cnt;
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bcs->tx_cnt -= bcs->tx_skb->len;
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bcs->hw.tiger.sp = bcs->hw.tiger.sendbuf;
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return(0);
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}
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static void got_frame(struct BCState *bcs, int count) {
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struct sk_buff *skb;
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if (!(skb = dev_alloc_skb(count)))
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printk(KERN_WARNING "TIGER: receive out of memory\n");
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else {
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memcpy(skb_put(skb, count), bcs->hw.tiger.rcvbuf, count);
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skb_queue_tail(&bcs->rqueue, skb);
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}
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test_and_set_bit(B_RCVBUFREADY, &bcs->event);
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schedule_work(&bcs->tqueue);
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if (bcs->cs->debug & L1_DEB_RECEIVE_FRAME)
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printframe(bcs->cs, bcs->hw.tiger.rcvbuf, count, "rec");
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}
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static void read_raw(struct BCState *bcs, u_int *buf, int cnt){
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int i;
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register u_char j;
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register u_char val;
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u_int *pend = bcs->hw.tiger.rec +NETJET_DMA_RXSIZE -1;
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register u_char state = bcs->hw.tiger.r_state;
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register u_char r_one = bcs->hw.tiger.r_one;
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register u_char r_val = bcs->hw.tiger.r_val;
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register u_int bitcnt = bcs->hw.tiger.r_bitcnt;
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u_int *p = buf;
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int bits;
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u_char mask;
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if (bcs->mode == L1_MODE_HDLC) { // it's 64k
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mask = 0xff;
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bits = 8;
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}
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else { // it's 56K
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mask = 0x7f;
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bits = 7;
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};
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for (i=0;i<cnt;i++) {
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val = bcs->channel ? ((*p>>8) & 0xff) : (*p & 0xff);
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p++;
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if (p > pend)
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p = bcs->hw.tiger.rec;
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if ((val & mask) == mask) {
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state = HDLC_ZERO_SEARCH;
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bcs->hw.tiger.r_tot++;
|
|
bitcnt = 0;
|
|
r_one = 0;
|
|
continue;
|
|
}
|
|
for (j=0;j<bits;j++) {
|
|
if (state == HDLC_ZERO_SEARCH) {
|
|
if (val & 1) {
|
|
r_one++;
|
|
} else {
|
|
r_one=0;
|
|
state= HDLC_FLAG_SEARCH;
|
|
if (bcs->cs->debug & L1_DEB_HSCX)
|
|
debugl1(bcs->cs,"tiger read_raw: zBit(%d,%d,%d) %x",
|
|
bcs->hw.tiger.r_tot,i,j,val);
|
|
}
|
|
} else if (state == HDLC_FLAG_SEARCH) {
|
|
if (val & 1) {
|
|
r_one++;
|
|
if (r_one>6) {
|
|
state=HDLC_ZERO_SEARCH;
|
|
}
|
|
} else {
|
|
if (r_one==6) {
|
|
bitcnt=0;
|
|
r_val=0;
|
|
state=HDLC_FLAG_FOUND;
|
|
if (bcs->cs->debug & L1_DEB_HSCX)
|
|
debugl1(bcs->cs,"tiger read_raw: flag(%d,%d,%d) %x",
|
|
bcs->hw.tiger.r_tot,i,j,val);
|
|
}
|
|
r_one=0;
|
|
}
|
|
} else if (state == HDLC_FLAG_FOUND) {
|
|
if (val & 1) {
|
|
r_one++;
|
|
if (r_one>6) {
|
|
state=HDLC_ZERO_SEARCH;
|
|
} else {
|
|
r_val >>= 1;
|
|
r_val |= 0x80;
|
|
bitcnt++;
|
|
}
|
|
} else {
|
|
if (r_one==6) {
|
|
bitcnt=0;
|
|
r_val=0;
|
|
r_one=0;
|
|
val >>= 1;
|
|
continue;
|
|
} else if (r_one!=5) {
|
|
r_val >>= 1;
|
|
r_val &= 0x7f;
|
|
bitcnt++;
|
|
}
|
|
r_one=0;
|
|
}
|
|
if ((state != HDLC_ZERO_SEARCH) &&
|
|
!(bitcnt & 7)) {
|
|
state=HDLC_FRAME_FOUND;
|
|
bcs->hw.tiger.r_fcs = PPP_INITFCS;
|
|
bcs->hw.tiger.rcvbuf[0] = r_val;
|
|
bcs->hw.tiger.r_fcs = PPP_FCS (bcs->hw.tiger.r_fcs, r_val);
|
|
if (bcs->cs->debug & L1_DEB_HSCX)
|
|
debugl1(bcs->cs,"tiger read_raw: byte1(%d,%d,%d) rval %x val %x i %x",
|
|
bcs->hw.tiger.r_tot,i,j,r_val,val,
|
|
bcs->cs->hw.njet.irqstat0);
|
|
}
|
|
} else if (state == HDLC_FRAME_FOUND) {
|
|
if (val & 1) {
|
|
r_one++;
|
|
if (r_one>6) {
|
|
state=HDLC_ZERO_SEARCH;
|
|
bitcnt=0;
|
|
} else {
|
|
r_val >>= 1;
|
|
r_val |= 0x80;
|
|
bitcnt++;
|
|
}
|
|
} else {
|
|
if (r_one==6) {
|
|
r_val=0;
|
|
r_one=0;
|
|
bitcnt++;
|
|
if (bitcnt & 7) {
|
|
debugl1(bcs->cs, "tiger: frame not byte aligned");
|
|
state=HDLC_FLAG_SEARCH;
|
|
bcs->hw.tiger.r_err++;
|
|
#ifdef ERROR_STATISTIC
|
|
bcs->err_inv++;
|
|
#endif
|
|
} else {
|
|
if (bcs->cs->debug & L1_DEB_HSCX)
|
|
debugl1(bcs->cs,"tiger frame end(%d,%d): fcs(%x) i %x",
|
|
i,j,bcs->hw.tiger.r_fcs, bcs->cs->hw.njet.irqstat0);
|
|
if (bcs->hw.tiger.r_fcs == PPP_GOODFCS) {
|
|
got_frame(bcs, (bitcnt>>3)-3);
|
|
} else {
|
|
if (bcs->cs->debug) {
|
|
debugl1(bcs->cs, "tiger FCS error");
|
|
printframe(bcs->cs, bcs->hw.tiger.rcvbuf,
|
|
(bitcnt>>3)-1, "rec");
|
|
bcs->hw.tiger.r_err++;
|
|
}
|
|
#ifdef ERROR_STATISTIC
|
|
bcs->err_crc++;
|
|
#endif
|
|
}
|
|
state=HDLC_FLAG_FOUND;
|
|
}
|
|
bitcnt=0;
|
|
} else if (r_one==5) {
|
|
val >>= 1;
|
|
r_one=0;
|
|
continue;
|
|
} else {
|
|
r_val >>= 1;
|
|
r_val &= 0x7f;
|
|
bitcnt++;
|
|
}
|
|
r_one=0;
|
|
}
|
|
if ((state == HDLC_FRAME_FOUND) &&
|
|
!(bitcnt & 7)) {
|
|
if ((bitcnt>>3)>=HSCX_BUFMAX) {
|
|
debugl1(bcs->cs, "tiger: frame too big");
|
|
r_val=0;
|
|
state=HDLC_FLAG_SEARCH;
|
|
bcs->hw.tiger.r_err++;
|
|
#ifdef ERROR_STATISTIC
|
|
bcs->err_inv++;
|
|
#endif
|
|
} else {
|
|
bcs->hw.tiger.rcvbuf[(bitcnt>>3)-1] = r_val;
|
|
bcs->hw.tiger.r_fcs =
|
|
PPP_FCS (bcs->hw.tiger.r_fcs, r_val);
|
|
}
|
|
}
|
|
}
|
|
val >>= 1;
|
|
}
|
|
bcs->hw.tiger.r_tot++;
|
|
}
|
|
bcs->hw.tiger.r_state = state;
|
|
bcs->hw.tiger.r_one = r_one;
|
|
bcs->hw.tiger.r_val = r_val;
|
|
bcs->hw.tiger.r_bitcnt = bitcnt;
|
|
}
|
|
|
|
void read_tiger(struct IsdnCardState *cs) {
|
|
u_int *p;
|
|
int cnt = NETJET_DMA_RXSIZE/2;
|
|
|
|
if ((cs->hw.njet.irqstat0 & cs->hw.njet.last_is0) & NETJET_IRQM0_READ) {
|
|
debugl1(cs,"tiger warn read double dma %x/%x",
|
|
cs->hw.njet.irqstat0, cs->hw.njet.last_is0);
|
|
#ifdef ERROR_STATISTIC
|
|
if (cs->bcs[0].mode)
|
|
cs->bcs[0].err_rdo++;
|
|
if (cs->bcs[1].mode)
|
|
cs->bcs[1].err_rdo++;
|
|
#endif
|
|
return;
|
|
} else {
|
|
cs->hw.njet.last_is0 &= ~NETJET_IRQM0_READ;
|
|
cs->hw.njet.last_is0 |= (cs->hw.njet.irqstat0 & NETJET_IRQM0_READ);
|
|
}
|
|
if (cs->hw.njet.irqstat0 & NETJET_IRQM0_READ_1)
|
|
p = cs->bcs[0].hw.tiger.rec + NETJET_DMA_RXSIZE - 1;
|
|
else
|
|
p = cs->bcs[0].hw.tiger.rec + cnt - 1;
|
|
if ((cs->bcs[0].mode == L1_MODE_HDLC) || (cs->bcs[0].mode == L1_MODE_HDLC_56K))
|
|
read_raw(cs->bcs, p, cnt);
|
|
|
|
if ((cs->bcs[1].mode == L1_MODE_HDLC) || (cs->bcs[1].mode == L1_MODE_HDLC_56K))
|
|
read_raw(cs->bcs + 1, p, cnt);
|
|
cs->hw.njet.irqstat0 &= ~NETJET_IRQM0_READ;
|
|
}
|
|
|
|
static void write_raw(struct BCState *bcs, u_int *buf, int cnt);
|
|
|
|
void netjet_fill_dma(struct BCState *bcs)
|
|
{
|
|
register u_int *p, *sp;
|
|
register int cnt;
|
|
|
|
if (!bcs->tx_skb)
|
|
return;
|
|
if (bcs->cs->debug & L1_DEB_HSCX)
|
|
debugl1(bcs->cs,"tiger fill_dma1: c%d %4x", bcs->channel,
|
|
bcs->Flag);
|
|
if (test_and_set_bit(BC_FLG_BUSY, &bcs->Flag))
|
|
return;
|
|
if (bcs->mode == L1_MODE_HDLC) { // it's 64k
|
|
if (make_raw_data(bcs))
|
|
return;
|
|
}
|
|
else { // it's 56k
|
|
if (make_raw_data_56k(bcs))
|
|
return;
|
|
};
|
|
if (bcs->cs->debug & L1_DEB_HSCX)
|
|
debugl1(bcs->cs,"tiger fill_dma2: c%d %4x", bcs->channel,
|
|
bcs->Flag);
|
|
if (test_and_clear_bit(BC_FLG_NOFRAME, &bcs->Flag)) {
|
|
write_raw(bcs, bcs->hw.tiger.sendp, bcs->hw.tiger.free);
|
|
} else if (test_and_clear_bit(BC_FLG_HALF, &bcs->Flag)) {
|
|
p = bus_to_virt(inl(bcs->cs->hw.njet.base + NETJET_DMA_READ_ADR));
|
|
sp = bcs->hw.tiger.sendp;
|
|
if (p == bcs->hw.tiger.s_end)
|
|
p = bcs->hw.tiger.send -1;
|
|
if (sp == bcs->hw.tiger.s_end)
|
|
sp = bcs->hw.tiger.send -1;
|
|
cnt = p - sp;
|
|
if (cnt <0) {
|
|
write_raw(bcs, bcs->hw.tiger.sendp, bcs->hw.tiger.free);
|
|
} else {
|
|
p++;
|
|
cnt++;
|
|
if (p > bcs->hw.tiger.s_end)
|
|
p = bcs->hw.tiger.send;
|
|
p++;
|
|
cnt++;
|
|
if (p > bcs->hw.tiger.s_end)
|
|
p = bcs->hw.tiger.send;
|
|
write_raw(bcs, p, bcs->hw.tiger.free - cnt);
|
|
}
|
|
} else if (test_and_clear_bit(BC_FLG_EMPTY, &bcs->Flag)) {
|
|
p = bus_to_virt(inl(bcs->cs->hw.njet.base + NETJET_DMA_READ_ADR));
|
|
cnt = bcs->hw.tiger.s_end - p;
|
|
if (cnt < 2) {
|
|
p = bcs->hw.tiger.send + 1;
|
|
cnt = NETJET_DMA_TXSIZE/2 - 2;
|
|
} else {
|
|
p++;
|
|
p++;
|
|
if (cnt <= (NETJET_DMA_TXSIZE/2))
|
|
cnt += NETJET_DMA_TXSIZE/2;
|
|
cnt--;
|
|
cnt--;
|
|
}
|
|
write_raw(bcs, p, cnt);
|
|
}
|
|
if (bcs->cs->debug & L1_DEB_HSCX)
|
|
debugl1(bcs->cs,"tiger fill_dma3: c%d %4x", bcs->channel,
|
|
bcs->Flag);
|
|
}
|
|
|
|
static void write_raw(struct BCState *bcs, u_int *buf, int cnt) {
|
|
u_int mask, val, *p=buf;
|
|
u_int i, s_cnt;
|
|
|
|
if (cnt <= 0)
|
|
return;
|
|
if (test_bit(BC_FLG_BUSY, &bcs->Flag)) {
|
|
if (bcs->hw.tiger.sendcnt> cnt) {
|
|
s_cnt = cnt;
|
|
bcs->hw.tiger.sendcnt -= cnt;
|
|
} else {
|
|
s_cnt = bcs->hw.tiger.sendcnt;
|
|
bcs->hw.tiger.sendcnt = 0;
|
|
}
|
|
if (bcs->channel)
|
|
mask = 0xffff00ff;
|
|
else
|
|
mask = 0xffffff00;
|
|
for (i=0; i<s_cnt; i++) {
|
|
val = bcs->channel ? ((bcs->hw.tiger.sp[i] <<8) & 0xff00) :
|
|
(bcs->hw.tiger.sp[i]);
|
|
*p &= mask;
|
|
*p++ |= val;
|
|
if (p>bcs->hw.tiger.s_end)
|
|
p = bcs->hw.tiger.send;
|
|
}
|
|
bcs->hw.tiger.s_tot += s_cnt;
|
|
if (bcs->cs->debug & L1_DEB_HSCX)
|
|
debugl1(bcs->cs,"tiger write_raw: c%d %p-%p %d/%d %d %x", bcs->channel,
|
|
buf, p, s_cnt, cnt,
|
|
bcs->hw.tiger.sendcnt, bcs->cs->hw.njet.irqstat0);
|
|
if (bcs->cs->debug & L1_DEB_HSCX_FIFO)
|
|
printframe(bcs->cs, bcs->hw.tiger.sp, s_cnt, "snd");
|
|
bcs->hw.tiger.sp += s_cnt;
|
|
bcs->hw.tiger.sendp = p;
|
|
if (!bcs->hw.tiger.sendcnt) {
|
|
if (!bcs->tx_skb) {
|
|
debugl1(bcs->cs,"tiger write_raw: NULL skb s_cnt %d", s_cnt);
|
|
} else {
|
|
if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) &&
|
|
(PACKET_NOACK != bcs->tx_skb->pkt_type)) {
|
|
u_long flags;
|
|
spin_lock_irqsave(&bcs->aclock, flags);
|
|
bcs->ackcnt += bcs->tx_skb->len;
|
|
spin_unlock_irqrestore(&bcs->aclock, flags);
|
|
schedule_event(bcs, B_ACKPENDING);
|
|
}
|
|
dev_kfree_skb_any(bcs->tx_skb);
|
|
bcs->tx_skb = NULL;
|
|
}
|
|
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
|
|
bcs->hw.tiger.free = cnt - s_cnt;
|
|
if (bcs->hw.tiger.free > (NETJET_DMA_TXSIZE/2))
|
|
test_and_set_bit(BC_FLG_HALF, &bcs->Flag);
|
|
else {
|
|
test_and_clear_bit(BC_FLG_HALF, &bcs->Flag);
|
|
test_and_set_bit(BC_FLG_NOFRAME, &bcs->Flag);
|
|
}
|
|
if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) {
|
|
netjet_fill_dma(bcs);
|
|
} else {
|
|
mask ^= 0xffffffff;
|
|
if (s_cnt < cnt) {
|
|
for (i=s_cnt; i<cnt;i++) {
|
|
*p++ |= mask;
|
|
if (p>bcs->hw.tiger.s_end)
|
|
p = bcs->hw.tiger.send;
|
|
}
|
|
if (bcs->cs->debug & L1_DEB_HSCX)
|
|
debugl1(bcs->cs, "tiger write_raw: fill rest %d",
|
|
cnt - s_cnt);
|
|
}
|
|
test_and_set_bit(B_XMTBUFREADY, &bcs->event);
|
|
schedule_work(&bcs->tqueue);
|
|
}
|
|
}
|
|
} else if (test_and_clear_bit(BC_FLG_NOFRAME, &bcs->Flag)) {
|
|
test_and_set_bit(BC_FLG_HALF, &bcs->Flag);
|
|
fill_mem(bcs, buf, cnt, bcs->channel, 0xff);
|
|
bcs->hw.tiger.free += cnt;
|
|
if (bcs->cs->debug & L1_DEB_HSCX)
|
|
debugl1(bcs->cs,"tiger write_raw: fill half");
|
|
} else if (test_and_clear_bit(BC_FLG_HALF, &bcs->Flag)) {
|
|
test_and_set_bit(BC_FLG_EMPTY, &bcs->Flag);
|
|
fill_mem(bcs, buf, cnt, bcs->channel, 0xff);
|
|
if (bcs->cs->debug & L1_DEB_HSCX)
|
|
debugl1(bcs->cs,"tiger write_raw: fill full");
|
|
}
|
|
}
|
|
|
|
void write_tiger(struct IsdnCardState *cs) {
|
|
u_int *p, cnt = NETJET_DMA_TXSIZE/2;
|
|
|
|
if ((cs->hw.njet.irqstat0 & cs->hw.njet.last_is0) & NETJET_IRQM0_WRITE) {
|
|
debugl1(cs,"tiger warn write double dma %x/%x",
|
|
cs->hw.njet.irqstat0, cs->hw.njet.last_is0);
|
|
#ifdef ERROR_STATISTIC
|
|
if (cs->bcs[0].mode)
|
|
cs->bcs[0].err_tx++;
|
|
if (cs->bcs[1].mode)
|
|
cs->bcs[1].err_tx++;
|
|
#endif
|
|
return;
|
|
} else {
|
|
cs->hw.njet.last_is0 &= ~NETJET_IRQM0_WRITE;
|
|
cs->hw.njet.last_is0 |= (cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE);
|
|
}
|
|
if (cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE_1)
|
|
p = cs->bcs[0].hw.tiger.send + NETJET_DMA_TXSIZE - 1;
|
|
else
|
|
p = cs->bcs[0].hw.tiger.send + cnt - 1;
|
|
if ((cs->bcs[0].mode == L1_MODE_HDLC) || (cs->bcs[0].mode == L1_MODE_HDLC_56K))
|
|
write_raw(cs->bcs, p, cnt);
|
|
if ((cs->bcs[1].mode == L1_MODE_HDLC) || (cs->bcs[1].mode == L1_MODE_HDLC_56K))
|
|
write_raw(cs->bcs + 1, p, cnt);
|
|
cs->hw.njet.irqstat0 &= ~NETJET_IRQM0_WRITE;
|
|
}
|
|
|
|
static void
|
|
tiger_l2l1(struct PStack *st, int pr, void *arg)
|
|
{
|
|
struct BCState *bcs = st->l1.bcs;
|
|
struct sk_buff *skb = arg;
|
|
u_long flags;
|
|
|
|
switch (pr) {
|
|
case (PH_DATA | REQUEST):
|
|
spin_lock_irqsave(&bcs->cs->lock, flags);
|
|
if (bcs->tx_skb) {
|
|
skb_queue_tail(&bcs->squeue, skb);
|
|
} else {
|
|
bcs->tx_skb = skb;
|
|
bcs->cs->BC_Send_Data(bcs);
|
|
}
|
|
spin_unlock_irqrestore(&bcs->cs->lock, flags);
|
|
break;
|
|
case (PH_PULL | INDICATION):
|
|
spin_lock_irqsave(&bcs->cs->lock, flags);
|
|
if (bcs->tx_skb) {
|
|
printk(KERN_WARNING "tiger_l2l1: this shouldn't happen\n");
|
|
} else {
|
|
bcs->tx_skb = skb;
|
|
bcs->cs->BC_Send_Data(bcs);
|
|
}
|
|
spin_unlock_irqrestore(&bcs->cs->lock, flags);
|
|
break;
|
|
case (PH_PULL | REQUEST):
|
|
if (!bcs->tx_skb) {
|
|
test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
|
|
st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
|
|
} else
|
|
test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
|
|
break;
|
|
case (PH_ACTIVATE | REQUEST):
|
|
spin_lock_irqsave(&bcs->cs->lock, flags);
|
|
test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
|
|
mode_tiger(bcs, st->l1.mode, st->l1.bc);
|
|
/* 2001/10/04 Christoph Ersfeld, Formula-n Europe AG */
|
|
spin_unlock_irqrestore(&bcs->cs->lock, flags);
|
|
bcs->cs->cardmsg(bcs->cs, MDL_BC_ASSIGN, (void *)(&st->l1.bc));
|
|
l1_msg_b(st, pr, arg);
|
|
break;
|
|
case (PH_DEACTIVATE | REQUEST):
|
|
/* 2001/10/04 Christoph Ersfeld, Formula-n Europe AG */
|
|
bcs->cs->cardmsg(bcs->cs, MDL_BC_RELEASE, (void *)(&st->l1.bc));
|
|
l1_msg_b(st, pr, arg);
|
|
break;
|
|
case (PH_DEACTIVATE | CONFIRM):
|
|
spin_lock_irqsave(&bcs->cs->lock, flags);
|
|
test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
|
|
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
|
|
mode_tiger(bcs, 0, st->l1.bc);
|
|
spin_unlock_irqrestore(&bcs->cs->lock, flags);
|
|
st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
|
|
break;
|
|
}
|
|
}
|
|
|
|
|
|
static void
|
|
close_tigerstate(struct BCState *bcs)
|
|
{
|
|
mode_tiger(bcs, 0, bcs->channel);
|
|
if (test_and_clear_bit(BC_FLG_INIT, &bcs->Flag)) {
|
|
kfree(bcs->hw.tiger.rcvbuf);
|
|
bcs->hw.tiger.rcvbuf = NULL;
|
|
kfree(bcs->hw.tiger.sendbuf);
|
|
bcs->hw.tiger.sendbuf = NULL;
|
|
skb_queue_purge(&bcs->rqueue);
|
|
skb_queue_purge(&bcs->squeue);
|
|
if (bcs->tx_skb) {
|
|
dev_kfree_skb_any(bcs->tx_skb);
|
|
bcs->tx_skb = NULL;
|
|
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
|
|
}
|
|
}
|
|
}
|
|
|
|
static int
|
|
open_tigerstate(struct IsdnCardState *cs, struct BCState *bcs)
|
|
{
|
|
if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) {
|
|
if (!(bcs->hw.tiger.rcvbuf = kmalloc(HSCX_BUFMAX, GFP_ATOMIC))) {
|
|
printk(KERN_WARNING
|
|
"HiSax: No memory for tiger.rcvbuf\n");
|
|
return (1);
|
|
}
|
|
if (!(bcs->hw.tiger.sendbuf = kmalloc(RAW_BUFMAX, GFP_ATOMIC))) {
|
|
printk(KERN_WARNING
|
|
"HiSax: No memory for tiger.sendbuf\n");
|
|
return (1);
|
|
}
|
|
skb_queue_head_init(&bcs->rqueue);
|
|
skb_queue_head_init(&bcs->squeue);
|
|
}
|
|
bcs->tx_skb = NULL;
|
|
bcs->hw.tiger.sendcnt = 0;
|
|
test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
|
|
bcs->event = 0;
|
|
bcs->tx_cnt = 0;
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
setstack_tiger(struct PStack *st, struct BCState *bcs)
|
|
{
|
|
bcs->channel = st->l1.bc;
|
|
if (open_tigerstate(st->l1.hardware, bcs))
|
|
return (-1);
|
|
st->l1.bcs = bcs;
|
|
st->l2.l2l1 = tiger_l2l1;
|
|
setstack_manager(st);
|
|
bcs->st = st;
|
|
setstack_l1_B(st);
|
|
return (0);
|
|
}
|
|
|
|
|
|
void
|
|
inittiger(struct IsdnCardState *cs)
|
|
{
|
|
if (!(cs->bcs[0].hw.tiger.send = kmalloc(NETJET_DMA_TXSIZE * sizeof(unsigned int),
|
|
GFP_KERNEL | GFP_DMA))) {
|
|
printk(KERN_WARNING
|
|
"HiSax: No memory for tiger.send\n");
|
|
return;
|
|
}
|
|
cs->bcs[0].hw.tiger.s_irq = cs->bcs[0].hw.tiger.send + NETJET_DMA_TXSIZE/2 - 1;
|
|
cs->bcs[0].hw.tiger.s_end = cs->bcs[0].hw.tiger.send + NETJET_DMA_TXSIZE - 1;
|
|
cs->bcs[1].hw.tiger.send = cs->bcs[0].hw.tiger.send;
|
|
cs->bcs[1].hw.tiger.s_irq = cs->bcs[0].hw.tiger.s_irq;
|
|
cs->bcs[1].hw.tiger.s_end = cs->bcs[0].hw.tiger.s_end;
|
|
|
|
memset(cs->bcs[0].hw.tiger.send, 0xff, NETJET_DMA_TXSIZE * sizeof(unsigned int));
|
|
debugl1(cs, "tiger: send buf %p - %p", cs->bcs[0].hw.tiger.send,
|
|
cs->bcs[0].hw.tiger.send + NETJET_DMA_TXSIZE - 1);
|
|
outl(virt_to_bus(cs->bcs[0].hw.tiger.send),
|
|
cs->hw.njet.base + NETJET_DMA_READ_START);
|
|
outl(virt_to_bus(cs->bcs[0].hw.tiger.s_irq),
|
|
cs->hw.njet.base + NETJET_DMA_READ_IRQ);
|
|
outl(virt_to_bus(cs->bcs[0].hw.tiger.s_end),
|
|
cs->hw.njet.base + NETJET_DMA_READ_END);
|
|
if (!(cs->bcs[0].hw.tiger.rec = kmalloc(NETJET_DMA_RXSIZE * sizeof(unsigned int),
|
|
GFP_KERNEL | GFP_DMA))) {
|
|
printk(KERN_WARNING
|
|
"HiSax: No memory for tiger.rec\n");
|
|
return;
|
|
}
|
|
debugl1(cs, "tiger: rec buf %p - %p", cs->bcs[0].hw.tiger.rec,
|
|
cs->bcs[0].hw.tiger.rec + NETJET_DMA_RXSIZE - 1);
|
|
cs->bcs[1].hw.tiger.rec = cs->bcs[0].hw.tiger.rec;
|
|
memset(cs->bcs[0].hw.tiger.rec, 0xff, NETJET_DMA_RXSIZE * sizeof(unsigned int));
|
|
outl(virt_to_bus(cs->bcs[0].hw.tiger.rec),
|
|
cs->hw.njet.base + NETJET_DMA_WRITE_START);
|
|
outl(virt_to_bus(cs->bcs[0].hw.tiger.rec + NETJET_DMA_RXSIZE/2 - 1),
|
|
cs->hw.njet.base + NETJET_DMA_WRITE_IRQ);
|
|
outl(virt_to_bus(cs->bcs[0].hw.tiger.rec + NETJET_DMA_RXSIZE - 1),
|
|
cs->hw.njet.base + NETJET_DMA_WRITE_END);
|
|
debugl1(cs, "tiger: dmacfg %x/%x pulse=%d",
|
|
inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR),
|
|
inl(cs->hw.njet.base + NETJET_DMA_READ_ADR),
|
|
bytein(cs->hw.njet.base + NETJET_PULSE_CNT));
|
|
cs->hw.njet.last_is0 = 0;
|
|
cs->bcs[0].BC_SetStack = setstack_tiger;
|
|
cs->bcs[1].BC_SetStack = setstack_tiger;
|
|
cs->bcs[0].BC_Close = close_tigerstate;
|
|
cs->bcs[1].BC_Close = close_tigerstate;
|
|
}
|
|
|
|
static void
|
|
releasetiger(struct IsdnCardState *cs)
|
|
{
|
|
kfree(cs->bcs[0].hw.tiger.send);
|
|
cs->bcs[0].hw.tiger.send = NULL;
|
|
cs->bcs[1].hw.tiger.send = NULL;
|
|
kfree(cs->bcs[0].hw.tiger.rec);
|
|
cs->bcs[0].hw.tiger.rec = NULL;
|
|
cs->bcs[1].hw.tiger.rec = NULL;
|
|
}
|
|
|
|
void
|
|
release_io_netjet(struct IsdnCardState *cs)
|
|
{
|
|
byteout(cs->hw.njet.base + NETJET_IRQMASK0, 0);
|
|
byteout(cs->hw.njet.base + NETJET_IRQMASK1, 0);
|
|
releasetiger(cs);
|
|
release_region(cs->hw.njet.base, 256);
|
|
}
|
|
|