forked from luck/tmp_suning_uos_patched
914a76ca5e
For some performance events it's useful to set the EDGE and INV bits and the CMASK mask in the counter control register. The list of predefined events Intel releases for each CPU has some events which require these settings to get more "natural" to use higher level events. oprofile currently doesn't allow this. This patch adds new extra configuration fields for them, so that they can be specified in oprofilefs. An updated oprofile daemon can then make use of this to set them. v2: Write back masked extra value to variable. Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Robert Richter <robert.richter@amd.com>
31 lines
532 B
C
31 lines
532 B
C
/**
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* @file op_counter.h
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*
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* @remark Copyright 2002 OProfile authors
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* @remark Read the file COPYING
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*
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* @author John Levon
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*/
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#ifndef OP_COUNTER_H
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#define OP_COUNTER_H
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#define OP_MAX_COUNTER 32
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/* Per-perfctr configuration as set via
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* oprofilefs.
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*/
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struct op_counter_config {
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unsigned long count;
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unsigned long enabled;
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unsigned long event;
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unsigned long kernel;
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unsigned long user;
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unsigned long unit_mask;
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unsigned long extra;
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};
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extern struct op_counter_config counter_config[];
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#endif /* OP_COUNTER_H */
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