forked from luck/tmp_suning_uos_patched
350779a29f
This extends the instruction emulation infrastructure in sstep.c to handle all the load and store instructions defined in the Power ISA v3.0, except for the atomic memory operations, ldmx (which was never implemented), lfdp/stfdp, and the vector element load/stores. The instructions added are: Integer loads and stores: lbarx, lharx, lqarx, stbcx., sthcx., stqcx., lq, stq. VSX loads and stores: lxsiwzx, lxsiwax, stxsiwx, lxvx, lxvl, lxvll, lxvdsx, lxvwsx, stxvx, stxvl, stxvll, lxsspx, lxsdx, stxsspx, stxsdx, lxvw4x, lxsibzx, lxvh8x, lxsihzx, lxvb16x, stxvw4x, stxsibx, stxvh8x, stxsihx, stxvb16x, lxsd, lxssp, lxv, stxsd, stxssp, stxv. These instructions are handled both in the analyse_instr phase and in the emulate_step phase. The code for lxvd2ux and stxvd2ux has been taken out, as those instructions were never implemented in any processor and have been taken out of the architecture, and their opcodes have been reused for other instructions in POWER9 (lxvb16x and stxvb16x). The emulation for the VSX loads and stores uses helper functions which don't access registers or memory directly, which can hopefully be reused by KVM later. Signed-off-by: Paul Mackerras <paulus@ozlabs.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
63 lines
1.3 KiB
ArmAsm
63 lines
1.3 KiB
ArmAsm
/*
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* Quadword loads and stores
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* for use in instruction emulation.
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*
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* Copyright 2017 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <asm/processor.h>
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#include <asm/ppc_asm.h>
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#include <asm/ppc-opcode.h>
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#include <asm/reg.h>
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#include <asm/asm-offsets.h>
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#include <linux/errno.h>
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/* do_lq(unsigned long ea, unsigned long *regs) */
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_GLOBAL(do_lq)
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1: lq r6, 0(r3)
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std r6, 0(r4)
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std r7, 8(r4)
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li r3, 0
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blr
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2: li r3, -EFAULT
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blr
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EX_TABLE(1b, 2b)
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/* do_stq(unsigned long ea, unsigned long val0, unsigned long val1) */
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_GLOBAL(do_stq)
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1: stq r4, 0(r3)
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li r3, 0
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blr
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2: li r3, -EFAULT
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blr
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EX_TABLE(1b, 2b)
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/* do_lqarx(unsigned long ea, unsigned long *regs) */
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_GLOBAL(do_lqarx)
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1: PPC_LQARX(6, 0, 3, 0)
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std r6, 0(r4)
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std r7, 8(r4)
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li r3, 0
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blr
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2: li r3, -EFAULT
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blr
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EX_TABLE(1b, 2b)
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/* do_stqcx(unsigned long ea, unsigned long val0, unsigned long val1,
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unsigned int *crp) */
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_GLOBAL(do_stqcx)
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1: PPC_STQCX(4, 0, 3)
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mfcr r5
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stw r5, 0(r6)
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li r3, 0
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blr
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2: li r3, -EFAULT
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blr
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EX_TABLE(1b, 2b)
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