forked from luck/tmp_suning_uos_patched
a3f90c75b8
Right now, satellite tuner drivers specify frequencies in kHz, while terrestrial/cable ones specify in Hz. That's confusing for developers. However, the main problem is that universal tuners capable of handling both satellite and non-satelite delivery systems are appearing. We end by needing to hack the drivers in order to support such hybrid tuners. So, convert everything to specify tuner frequencies in Hz. Plese notice that a similar patch is also needed for frontends. Tested-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com> Acked-by: Michael Büsch <m@bues.ch> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
550 lines
13 KiB
C
550 lines
13 KiB
C
/*
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* Driver for Microtune MT2060 "Single chip dual conversion broadband tuner"
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*
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* Copyright (c) 2006 Olivier DANET <odanet@caramail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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*
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* GNU General Public License for more details.
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*/
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/* In that file, frequencies are expressed in kiloHertz to avoid 32 bits overflows */
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/dvb/frontend.h>
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#include <linux/i2c.h>
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#include <linux/slab.h>
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#include <media/dvb_frontend.h>
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#include "mt2060.h"
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#include "mt2060_priv.h"
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static int debug;
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module_param(debug, int, 0644);
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MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
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#define dprintk(args...) do { if (debug) {printk(KERN_DEBUG "MT2060: " args); printk("\n"); }} while (0)
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// Reads a single register
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static int mt2060_readreg(struct mt2060_priv *priv, u8 reg, u8 *val)
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{
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struct i2c_msg msg[2] = {
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{ .addr = priv->cfg->i2c_address, .flags = 0, .len = 1 },
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{ .addr = priv->cfg->i2c_address, .flags = I2C_M_RD, .len = 1 },
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};
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int rc = 0;
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u8 *b;
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b = kmalloc(2, GFP_KERNEL);
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if (!b)
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return -ENOMEM;
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b[0] = reg;
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b[1] = 0;
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msg[0].buf = b;
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msg[1].buf = b + 1;
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if (i2c_transfer(priv->i2c, msg, 2) != 2) {
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printk(KERN_WARNING "mt2060 I2C read failed\n");
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rc = -EREMOTEIO;
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}
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*val = b[1];
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kfree(b);
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return rc;
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}
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// Writes a single register
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static int mt2060_writereg(struct mt2060_priv *priv, u8 reg, u8 val)
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{
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struct i2c_msg msg = {
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.addr = priv->cfg->i2c_address, .flags = 0, .len = 2
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};
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u8 *buf;
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int rc = 0;
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buf = kmalloc(2, GFP_KERNEL);
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if (!buf)
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return -ENOMEM;
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buf[0] = reg;
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buf[1] = val;
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msg.buf = buf;
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if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
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printk(KERN_WARNING "mt2060 I2C write failed\n");
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rc = -EREMOTEIO;
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}
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kfree(buf);
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return rc;
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}
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// Writes a set of consecutive registers
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static int mt2060_writeregs(struct mt2060_priv *priv,u8 *buf, u8 len)
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{
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int rem, val_len;
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u8 *xfer_buf;
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int rc = 0;
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struct i2c_msg msg = {
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.addr = priv->cfg->i2c_address, .flags = 0
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};
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xfer_buf = kmalloc(16, GFP_KERNEL);
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if (!xfer_buf)
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return -ENOMEM;
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msg.buf = xfer_buf;
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for (rem = len - 1; rem > 0; rem -= priv->i2c_max_regs) {
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val_len = min_t(int, rem, priv->i2c_max_regs);
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msg.len = 1 + val_len;
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xfer_buf[0] = buf[0] + len - 1 - rem;
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memcpy(&xfer_buf[1], &buf[1 + len - 1 - rem], val_len);
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if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
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printk(KERN_WARNING "mt2060 I2C write failed (len=%i)\n", val_len);
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rc = -EREMOTEIO;
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break;
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}
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}
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kfree(xfer_buf);
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return rc;
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}
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// Initialisation sequences
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// LNABAND=3, NUM1=0x3C, DIV1=0x74, NUM2=0x1080, DIV2=0x49
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static u8 mt2060_config1[] = {
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REG_LO1C1,
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0x3F, 0x74, 0x00, 0x08, 0x93
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};
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// FMCG=2, GP2=0, GP1=0
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static u8 mt2060_config2[] = {
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REG_MISC_CTRL,
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0x20, 0x1E, 0x30, 0xff, 0x80, 0xff, 0x00, 0x2c, 0x42
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};
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// VGAG=3, V1CSE=1
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#ifdef MT2060_SPURCHECK
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/* The function below calculates the frequency offset between the output frequency if2
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and the closer cross modulation subcarrier between lo1 and lo2 up to the tenth harmonic */
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static int mt2060_spurcalc(u32 lo1,u32 lo2,u32 if2)
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{
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int I,J;
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int dia,diamin,diff;
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diamin=1000000;
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for (I = 1; I < 10; I++) {
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J = ((2*I*lo1)/lo2+1)/2;
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diff = I*(int)lo1-J*(int)lo2;
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if (diff < 0) diff=-diff;
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dia = (diff-(int)if2);
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if (dia < 0) dia=-dia;
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if (diamin > dia) diamin=dia;
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}
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return diamin;
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}
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#define BANDWIDTH 4000 // kHz
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/* Calculates the frequency offset to add to avoid spurs. Returns 0 if no offset is needed */
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static int mt2060_spurcheck(u32 lo1,u32 lo2,u32 if2)
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{
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u32 Spur,Sp1,Sp2;
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int I,J;
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I=0;
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J=1000;
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Spur=mt2060_spurcalc(lo1,lo2,if2);
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if (Spur < BANDWIDTH) {
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/* Potential spurs detected */
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dprintk("Spurs before : f_lo1: %d f_lo2: %d (kHz)",
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(int)lo1,(int)lo2);
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I=1000;
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Sp1 = mt2060_spurcalc(lo1+I,lo2+I,if2);
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Sp2 = mt2060_spurcalc(lo1-I,lo2-I,if2);
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if (Sp1 < Sp2) {
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J=-J; I=-I; Spur=Sp2;
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} else
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Spur=Sp1;
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while (Spur < BANDWIDTH) {
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I += J;
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Spur = mt2060_spurcalc(lo1+I,lo2+I,if2);
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}
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dprintk("Spurs after : f_lo1: %d f_lo2: %d (kHz)",
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(int)(lo1+I),(int)(lo2+I));
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}
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return I;
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}
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#endif
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#define IF2 36150 // IF2 frequency = 36.150 MHz
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#define FREF 16000 // Quartz oscillator 16 MHz
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static int mt2060_set_params(struct dvb_frontend *fe)
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{
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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struct mt2060_priv *priv;
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int i=0;
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u32 freq;
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u8 lnaband;
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u32 f_lo1,f_lo2;
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u32 div1,num1,div2,num2;
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u8 b[8];
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u32 if1;
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priv = fe->tuner_priv;
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if1 = priv->if1_freq;
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b[0] = REG_LO1B1;
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b[1] = 0xFF;
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
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mt2060_writeregs(priv,b,2);
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freq = c->frequency / 1000; /* Hz -> kHz */
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f_lo1 = freq + if1 * 1000;
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f_lo1 = (f_lo1 / 250) * 250;
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f_lo2 = f_lo1 - freq - IF2;
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// From the Comtech datasheet, the step used is 50kHz. The tuner chip could be more precise
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f_lo2 = ((f_lo2 + 25) / 50) * 50;
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priv->frequency = (f_lo1 - f_lo2 - IF2) * 1000,
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#ifdef MT2060_SPURCHECK
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// LO-related spurs detection and correction
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num1 = mt2060_spurcheck(f_lo1,f_lo2,IF2);
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f_lo1 += num1;
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f_lo2 += num1;
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#endif
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//Frequency LO1 = 16MHz * (DIV1 + NUM1/64 )
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num1 = f_lo1 / (FREF / 64);
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div1 = num1 / 64;
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num1 &= 0x3f;
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// Frequency LO2 = 16MHz * (DIV2 + NUM2/8192 )
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num2 = f_lo2 * 64 / (FREF / 128);
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div2 = num2 / 8192;
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num2 &= 0x1fff;
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if (freq <= 95000) lnaband = 0xB0; else
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if (freq <= 180000) lnaband = 0xA0; else
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if (freq <= 260000) lnaband = 0x90; else
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if (freq <= 335000) lnaband = 0x80; else
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if (freq <= 425000) lnaband = 0x70; else
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if (freq <= 480000) lnaband = 0x60; else
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if (freq <= 570000) lnaband = 0x50; else
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if (freq <= 645000) lnaband = 0x40; else
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if (freq <= 730000) lnaband = 0x30; else
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if (freq <= 810000) lnaband = 0x20; else lnaband = 0x10;
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b[0] = REG_LO1C1;
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b[1] = lnaband | ((num1 >>2) & 0x0F);
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b[2] = div1;
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b[3] = (num2 & 0x0F) | ((num1 & 3) << 4);
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b[4] = num2 >> 4;
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b[5] = ((num2 >>12) & 1) | (div2 << 1);
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dprintk("IF1: %dMHz",(int)if1);
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dprintk("PLL freq=%dkHz f_lo1=%dkHz f_lo2=%dkHz",(int)freq,(int)f_lo1,(int)f_lo2);
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dprintk("PLL div1=%d num1=%d div2=%d num2=%d",(int)div1,(int)num1,(int)div2,(int)num2);
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dprintk("PLL [1..5]: %2x %2x %2x %2x %2x",(int)b[1],(int)b[2],(int)b[3],(int)b[4],(int)b[5]);
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mt2060_writeregs(priv,b,6);
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//Waits for pll lock or timeout
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i = 0;
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do {
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mt2060_readreg(priv,REG_LO_STATUS,b);
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if ((b[0] & 0x88)==0x88)
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break;
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msleep(4);
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i++;
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} while (i<10);
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
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return 0;
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}
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static void mt2060_calibrate(struct mt2060_priv *priv)
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{
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u8 b = 0;
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int i = 0;
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if (mt2060_writeregs(priv,mt2060_config1,sizeof(mt2060_config1)))
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return;
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if (mt2060_writeregs(priv,mt2060_config2,sizeof(mt2060_config2)))
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return;
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/* initialize the clock output */
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mt2060_writereg(priv, REG_VGAG, (priv->cfg->clock_out << 6) | 0x30);
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do {
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b |= (1 << 6); // FM1SS;
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mt2060_writereg(priv, REG_LO2C1,b);
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msleep(20);
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if (i == 0) {
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b |= (1 << 7); // FM1CA;
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mt2060_writereg(priv, REG_LO2C1,b);
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b &= ~(1 << 7); // FM1CA;
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msleep(20);
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}
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b &= ~(1 << 6); // FM1SS
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mt2060_writereg(priv, REG_LO2C1,b);
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msleep(20);
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i++;
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} while (i < 9);
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i = 0;
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while (i++ < 10 && mt2060_readreg(priv, REG_MISC_STAT, &b) == 0 && (b & (1 << 6)) == 0)
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msleep(20);
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if (i <= 10) {
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mt2060_readreg(priv, REG_FM_FREQ, &priv->fmfreq); // now find out, what is fmreq used for :)
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dprintk("calibration was successful: %d", (int)priv->fmfreq);
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} else
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dprintk("FMCAL timed out");
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}
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static int mt2060_get_frequency(struct dvb_frontend *fe, u32 *frequency)
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{
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struct mt2060_priv *priv = fe->tuner_priv;
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*frequency = priv->frequency;
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return 0;
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}
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static int mt2060_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
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{
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*frequency = IF2 * 1000;
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return 0;
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}
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static int mt2060_init(struct dvb_frontend *fe)
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{
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struct mt2060_priv *priv = fe->tuner_priv;
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int ret;
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
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if (priv->sleep) {
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ret = mt2060_writereg(priv, REG_MISC_CTRL, 0x20);
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if (ret)
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goto err_i2c_gate_ctrl;
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}
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ret = mt2060_writereg(priv, REG_VGAG,
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(priv->cfg->clock_out << 6) | 0x33);
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err_i2c_gate_ctrl:
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
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return ret;
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}
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static int mt2060_sleep(struct dvb_frontend *fe)
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{
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struct mt2060_priv *priv = fe->tuner_priv;
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int ret;
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
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ret = mt2060_writereg(priv, REG_VGAG,
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(priv->cfg->clock_out << 6) | 0x30);
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if (ret)
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goto err_i2c_gate_ctrl;
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if (priv->sleep)
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ret = mt2060_writereg(priv, REG_MISC_CTRL, 0xe8);
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err_i2c_gate_ctrl:
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
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return ret;
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}
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static void mt2060_release(struct dvb_frontend *fe)
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{
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kfree(fe->tuner_priv);
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fe->tuner_priv = NULL;
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}
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static const struct dvb_tuner_ops mt2060_tuner_ops = {
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.info = {
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.name = "Microtune MT2060",
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.frequency_min_hz = 48 * MHz,
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.frequency_max_hz = 860 * MHz,
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.frequency_step_hz = 50 * kHz,
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},
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.release = mt2060_release,
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.init = mt2060_init,
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.sleep = mt2060_sleep,
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.set_params = mt2060_set_params,
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.get_frequency = mt2060_get_frequency,
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.get_if_frequency = mt2060_get_if_frequency,
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};
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/* This functions tries to identify a MT2060 tuner by reading the PART/REV register. This is hasty. */
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struct dvb_frontend * mt2060_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct mt2060_config *cfg, u16 if1)
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{
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struct mt2060_priv *priv = NULL;
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u8 id = 0;
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priv = kzalloc(sizeof(struct mt2060_priv), GFP_KERNEL);
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if (priv == NULL)
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return NULL;
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priv->cfg = cfg;
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priv->i2c = i2c;
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priv->if1_freq = if1;
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priv->i2c_max_regs = ~0;
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
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if (mt2060_readreg(priv,REG_PART_REV,&id) != 0) {
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kfree(priv);
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return NULL;
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}
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if (id != PART_REV) {
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kfree(priv);
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return NULL;
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}
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printk(KERN_INFO "MT2060: successfully identified (IF1 = %d)\n", if1);
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memcpy(&fe->ops.tuner_ops, &mt2060_tuner_ops, sizeof(struct dvb_tuner_ops));
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fe->tuner_priv = priv;
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mt2060_calibrate(priv);
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
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return fe;
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}
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EXPORT_SYMBOL(mt2060_attach);
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static int mt2060_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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struct mt2060_platform_data *pdata = client->dev.platform_data;
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struct dvb_frontend *fe;
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struct mt2060_priv *dev;
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int ret;
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u8 chip_id;
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dev_dbg(&client->dev, "\n");
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if (!pdata) {
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dev_err(&client->dev, "Cannot proceed without platform data\n");
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ret = -EINVAL;
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goto err;
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}
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dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL);
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if (!dev) {
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ret = -ENOMEM;
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goto err;
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}
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fe = pdata->dvb_frontend;
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dev->config.i2c_address = client->addr;
|
|
dev->config.clock_out = pdata->clock_out;
|
|
dev->cfg = &dev->config;
|
|
dev->i2c = client->adapter;
|
|
dev->if1_freq = pdata->if1 ? pdata->if1 : 1220;
|
|
dev->client = client;
|
|
dev->i2c_max_regs = pdata->i2c_write_max ? pdata->i2c_write_max - 1 : ~0;
|
|
dev->sleep = true;
|
|
|
|
ret = mt2060_readreg(dev, REG_PART_REV, &chip_id);
|
|
if (ret) {
|
|
ret = -ENODEV;
|
|
goto err;
|
|
}
|
|
|
|
dev_dbg(&client->dev, "chip id=%02x\n", chip_id);
|
|
|
|
if (chip_id != PART_REV) {
|
|
ret = -ENODEV;
|
|
goto err;
|
|
}
|
|
|
|
/* Power on, calibrate, sleep */
|
|
ret = mt2060_writereg(dev, REG_MISC_CTRL, 0x20);
|
|
if (ret)
|
|
goto err;
|
|
mt2060_calibrate(dev);
|
|
ret = mt2060_writereg(dev, REG_MISC_CTRL, 0xe8);
|
|
if (ret)
|
|
goto err;
|
|
|
|
dev_info(&client->dev, "Microtune MT2060 successfully identified\n");
|
|
memcpy(&fe->ops.tuner_ops, &mt2060_tuner_ops, sizeof(fe->ops.tuner_ops));
|
|
fe->ops.tuner_ops.release = NULL;
|
|
fe->tuner_priv = dev;
|
|
i2c_set_clientdata(client, dev);
|
|
|
|
return 0;
|
|
err:
|
|
dev_dbg(&client->dev, "failed=%d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
static int mt2060_remove(struct i2c_client *client)
|
|
{
|
|
dev_dbg(&client->dev, "\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct i2c_device_id mt2060_id_table[] = {
|
|
{"mt2060", 0},
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, mt2060_id_table);
|
|
|
|
static struct i2c_driver mt2060_driver = {
|
|
.driver = {
|
|
.name = "mt2060",
|
|
.suppress_bind_attrs = true,
|
|
},
|
|
.probe = mt2060_probe,
|
|
.remove = mt2060_remove,
|
|
.id_table = mt2060_id_table,
|
|
};
|
|
|
|
module_i2c_driver(mt2060_driver);
|
|
|
|
MODULE_AUTHOR("Olivier DANET");
|
|
MODULE_DESCRIPTION("Microtune MT2060 silicon tuner driver");
|
|
MODULE_LICENSE("GPL");
|