forked from luck/tmp_suning_uos_patched
b40881738f
This function is confusing - its second argument is an index to the freq table, not the requested clock rate in Hz, but it's used as the set_rate callback for the pll0 clock. It leads to an oops when the caller doesn't know the internals and passes the rate in Hz as argument instead of the cpufreq index since this argument isn't bounds checked either. Fix it by iterating over the array of supported frequencies and selecting a one that matches or returning -EINVAL for unsupported rates. Also: update the davinci cpufreq driver. It's the only user of this clock and currently it passes the cpufreq table index to clk_set_rate(), which is confusing. Make it pass the requested clock rate in Hz. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> [nsekhar@ti.com: commit headline update] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
162 lines
4.0 KiB
C
162 lines
4.0 KiB
C
/*
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* CPU frequency scaling for DaVinci
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*
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* Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
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*
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* Based on linux/arch/arm/plat-omap/cpu-omap.c. Original Copyright follows:
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*
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* Copyright (C) 2005 Nokia Corporation
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* Written by Tony Lindgren <tony@atomide.com>
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*
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* Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
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*
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* Copyright (C) 2007-2008 Texas Instruments, Inc.
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* Updated to support OMAP3
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* Rajendra Nayak <rnayak@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/types.h>
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#include <linux/cpufreq.h>
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#include <linux/init.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/platform_device.h>
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#include <linux/export.h>
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#include <mach/hardware.h>
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#include <mach/cpufreq.h>
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#include <mach/common.h>
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struct davinci_cpufreq {
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struct device *dev;
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struct clk *armclk;
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struct clk *asyncclk;
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unsigned long asyncrate;
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};
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static struct davinci_cpufreq cpufreq;
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static int davinci_target(struct cpufreq_policy *policy, unsigned int idx)
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{
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struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data;
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struct clk *armclk = cpufreq.armclk;
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unsigned int old_freq, new_freq;
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int ret = 0;
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old_freq = policy->cur;
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new_freq = pdata->freq_table[idx].frequency;
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/* if moving to higher frequency, up the voltage beforehand */
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if (pdata->set_voltage && new_freq > old_freq) {
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ret = pdata->set_voltage(idx);
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if (ret)
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return ret;
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}
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ret = clk_set_rate(armclk, new_freq * 1000);
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if (ret)
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return ret;
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if (cpufreq.asyncclk) {
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ret = clk_set_rate(cpufreq.asyncclk, cpufreq.asyncrate);
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if (ret)
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return ret;
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}
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/* if moving to lower freq, lower the voltage after lowering freq */
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if (pdata->set_voltage && new_freq < old_freq)
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pdata->set_voltage(idx);
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return 0;
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}
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static int davinci_cpu_init(struct cpufreq_policy *policy)
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{
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int result = 0;
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struct davinci_cpufreq_config *pdata = cpufreq.dev->platform_data;
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struct cpufreq_frequency_table *freq_table = pdata->freq_table;
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if (policy->cpu != 0)
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return -EINVAL;
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/* Finish platform specific initialization */
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if (pdata->init) {
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result = pdata->init();
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if (result)
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return result;
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}
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policy->clk = cpufreq.armclk;
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/*
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* Time measurement across the target() function yields ~1500-1800us
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* time taken with no drivers on notification list.
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* Setting the latency to 2000 us to accommodate addition of drivers
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* to pre/post change notification list.
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*/
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return cpufreq_generic_init(policy, freq_table, 2000 * 1000);
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}
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static struct cpufreq_driver davinci_driver = {
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.flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
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.verify = cpufreq_generic_frequency_table_verify,
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.target_index = davinci_target,
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.get = cpufreq_generic_get,
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.init = davinci_cpu_init,
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.name = "davinci",
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.attr = cpufreq_generic_attr,
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};
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static int __init davinci_cpufreq_probe(struct platform_device *pdev)
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{
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struct davinci_cpufreq_config *pdata = pdev->dev.platform_data;
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struct clk *asyncclk;
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if (!pdata)
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return -EINVAL;
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if (!pdata->freq_table)
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return -EINVAL;
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cpufreq.dev = &pdev->dev;
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cpufreq.armclk = clk_get(NULL, "arm");
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if (IS_ERR(cpufreq.armclk)) {
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dev_err(cpufreq.dev, "Unable to get ARM clock\n");
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return PTR_ERR(cpufreq.armclk);
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}
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asyncclk = clk_get(cpufreq.dev, "async");
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if (!IS_ERR(asyncclk)) {
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cpufreq.asyncclk = asyncclk;
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cpufreq.asyncrate = clk_get_rate(asyncclk);
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}
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return cpufreq_register_driver(&davinci_driver);
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}
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static int __exit davinci_cpufreq_remove(struct platform_device *pdev)
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{
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clk_put(cpufreq.armclk);
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if (cpufreq.asyncclk)
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clk_put(cpufreq.asyncclk);
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return cpufreq_unregister_driver(&davinci_driver);
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}
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static struct platform_driver davinci_cpufreq_driver = {
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.driver = {
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.name = "cpufreq-davinci",
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},
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.remove = __exit_p(davinci_cpufreq_remove),
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};
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int __init davinci_cpufreq_init(void)
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{
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return platform_driver_probe(&davinci_cpufreq_driver,
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davinci_cpufreq_probe);
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}
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