forked from luck/tmp_suning_uos_patched
7f7c8a6192
There are two reasons for making the MFP configuration to be processor
independent, i.e. removing the relationship of configuration bits with
actual MFPR register settings:
1. power management sometimes requires the MFP to be configured
differently when in run mode or in low power mode
2. for future integration of pxa{25x,27x} GPIO configurations
The modifications include:
1. introducing of processor independent MFP configuration bits, as
defined in [include/asm-arm/arch-pxa/mfp.h]:
bit 0.. 9 - MFP Pin Number (1024 Pins Maximum)
bit 10..12 - Alternate Function Selection
bit 13..15 - Drive Strength
bit 16..18 - Low Power Mode State
bit 19..20 - Low Power Mode Edge Detection
bit 21..22 - Run Mode Pull State
and so on,
2. moving the processor dependent code from mfp.h into mfp-pxa3xx.h
3. cleaning up of the MFPR bit definitions
4. mapping of processor independent MFP configuration into processor
specific MFPR register settings is now totally encapsulated within
pxa3xx_mfp_config()
5. using of "unsigned long" instead of invented type of "mfp_cfg_t"
according to Documentation/CodingStyle Chapter 5, usage of this
in platform code will be slowly removed in later patches
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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