forked from luck/tmp_suning_uos_patched
4808a1c026
This patch provides an "isp116x-hcd" driver for Philips' ISP1160/ISP1161 USB host controllers. The driver: - is relatively small, meant for use on embedded platforms. - runs usbtests 1-14 without problems for days. - has been in use by 6-7 different people on ARM and PPC platforms, running a range of devices including USB hubs. - supports suspend/resume of both the platform device and the root hub; supports remote wakeup of the root hub (but NOT the platform device) by USB devices. - does NOT support ISO transfers (nobody has asked for them). - is PIO-only. Signed-off-by: Olav Kongas <ok@artecdesign.ee> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
48 lines
1.7 KiB
C
48 lines
1.7 KiB
C
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/*
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* Board initialization code should put one of these into dev->platform_data
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* and place the isp116x onto platform_bus.
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*/
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struct isp116x_platform_data {
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/* Enable internal resistors on downstream ports */
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unsigned sel15Kres:1;
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/* Chip's internal clock won't be stopped in suspended state.
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Setting/unsetting this bit takes effect only if
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'remote_wakeup_enable' below is not set. */
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unsigned clknotstop:1;
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/* On-chip overcurrent protection */
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unsigned oc_enable:1;
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/* INT output polarity */
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unsigned int_act_high:1;
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/* INT edge or level triggered */
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unsigned int_edge_triggered:1;
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/* WAKEUP pin connected - NOT SUPPORTED */
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/* unsigned remote_wakeup_connected:1; */
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/* Wakeup by devices on usb bus enabled */
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unsigned remote_wakeup_enable:1;
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/* Switch or not to switch (keep always powered) */
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unsigned no_power_switching:1;
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/* Ganged port power switching (0) or individual port
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power switching (1) */
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unsigned power_switching_mode:1;
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/* Given port_power, msec/2 after power on till power good */
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u8 potpg;
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/* Hardware reset set/clear. If implemented, this function must:
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if set == 0, deassert chip's HW reset pin
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otherwise, assert chip's HW reset pin */
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void (*reset) (struct device * dev, int set);
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/* Hardware clock start/stop. If implemented, this function must:
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if start == 0, stop the external clock
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otherwise, start the external clock
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*/
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void (*clock) (struct device * dev, int start);
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/* Inter-io delay (ns). The chip is picky about access timings; it
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expects at least:
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150ns delay between consecutive accesses to DATA_REG,
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300ns delay between access to ADDR_REG and DATA_REG
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OE, WE MUST NOT be changed during these intervals
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*/
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void (*delay) (struct device * dev, int delay);
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};
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