forked from luck/tmp_suning_uos_patched
58e9f94138
Add definitions of rmb() and cpu_relax() and include the ARM unistd.h header. The __kuser_memory_barrier helper in the helper page is used to provide the correct memory barrier depending on the CPU type. [ The rmb() will work on v6 and v7, segfault on v5. Dynamic detection to add v5 support will be added later. ] Signed-off-by: Jamie Iles <jamie.iles@picochip.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Mikael Pettersson <mikpe@it.uu.se> LKML-Reference: <1260534009-5394-1-git-send-email-jamie.iles@picochip.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
135 lines
3.3 KiB
C
135 lines
3.3 KiB
C
#ifndef _PERF_PERF_H
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#define _PERF_PERF_H
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#if defined(__i386__)
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#include "../../arch/x86/include/asm/unistd.h"
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#define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
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#define cpu_relax() asm volatile("rep; nop" ::: "memory");
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#endif
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#if defined(__x86_64__)
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#include "../../arch/x86/include/asm/unistd.h"
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#define rmb() asm volatile("lfence" ::: "memory")
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#define cpu_relax() asm volatile("rep; nop" ::: "memory");
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#endif
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#ifdef __powerpc__
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#include "../../arch/powerpc/include/asm/unistd.h"
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#define rmb() asm volatile ("sync" ::: "memory")
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#define cpu_relax() asm volatile ("" ::: "memory");
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#endif
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#ifdef __s390__
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#include "../../arch/s390/include/asm/unistd.h"
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#define rmb() asm volatile("bcr 15,0" ::: "memory")
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#define cpu_relax() asm volatile("" ::: "memory");
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#endif
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#ifdef __sh__
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#include "../../arch/sh/include/asm/unistd.h"
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#if defined(__SH4A__) || defined(__SH5__)
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# define rmb() asm volatile("synco" ::: "memory")
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#else
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# define rmb() asm volatile("" ::: "memory")
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#endif
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#define cpu_relax() asm volatile("" ::: "memory")
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#endif
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#ifdef __hppa__
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#include "../../arch/parisc/include/asm/unistd.h"
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#define rmb() asm volatile("" ::: "memory")
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#define cpu_relax() asm volatile("" ::: "memory");
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#endif
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#ifdef __sparc__
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#include "../../arch/sparc/include/asm/unistd.h"
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#define rmb() asm volatile("":::"memory")
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#define cpu_relax() asm volatile("":::"memory")
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#endif
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#ifdef __alpha__
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#include "../../arch/alpha/include/asm/unistd.h"
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#define rmb() asm volatile("mb" ::: "memory")
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#define cpu_relax() asm volatile("" ::: "memory")
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#endif
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#ifdef __ia64__
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#include "../../arch/ia64/include/asm/unistd.h"
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#define rmb() asm volatile ("mf" ::: "memory")
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#define cpu_relax() asm volatile ("hint @pause" ::: "memory")
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#endif
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#ifdef __arm__
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#include "../../arch/arm/include/asm/unistd.h"
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/*
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* Use the __kuser_memory_barrier helper in the CPU helper page. See
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* arch/arm/kernel/entry-armv.S in the kernel source for details.
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*/
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#define rmb() asm volatile("mov r0, #0xffff0fff; mov lr, pc;" \
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"sub pc, r0, #95" ::: "r0", "lr", "cc", \
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"memory")
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#define cpu_relax() asm volatile("":::"memory")
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#endif
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#include <time.h>
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#include <unistd.h>
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#include <sys/types.h>
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#include <sys/syscall.h>
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#include "../../include/linux/perf_event.h"
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#include "util/types.h"
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/*
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* prctl(PR_TASK_PERF_EVENTS_DISABLE) will (cheaply) disable all
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* counters in the current task.
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*/
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#define PR_TASK_PERF_EVENTS_DISABLE 31
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#define PR_TASK_PERF_EVENTS_ENABLE 32
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#ifndef NSEC_PER_SEC
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# define NSEC_PER_SEC 1000000000ULL
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#endif
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static inline unsigned long long rdclock(void)
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{
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struct timespec ts;
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clock_gettime(CLOCK_MONOTONIC, &ts);
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return ts.tv_sec * 1000000000ULL + ts.tv_nsec;
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}
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/*
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* Pick up some kernel type conventions:
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*/
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#define __user
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#define asmlinkage
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#define __used __attribute__((__unused__))
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#define unlikely(x) __builtin_expect(!!(x), 0)
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#define min(x, y) ({ \
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typeof(x) _min1 = (x); \
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typeof(y) _min2 = (y); \
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(void) (&_min1 == &_min2); \
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_min1 < _min2 ? _min1 : _min2; })
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static inline int
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sys_perf_event_open(struct perf_event_attr *attr,
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pid_t pid, int cpu, int group_fd,
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unsigned long flags)
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{
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attr->size = sizeof(*attr);
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return syscall(__NR_perf_event_open, attr, pid, cpu,
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group_fd, flags);
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}
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#define MAX_COUNTERS 256
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#define MAX_NR_CPUS 256
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struct ip_callchain {
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u64 nr;
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u64 ips[0];
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};
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#endif
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