forked from luck/tmp_suning_uos_patched
1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
92 lines
2.5 KiB
ArmAsm
92 lines
2.5 KiB
ArmAsm
/*
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* arch/mips/dec/call_o32.S
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*
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* O32 interface for the 64 (or N32) ABI.
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*
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* Copyright (C) 2002 Maciej W. Rozycki
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <asm/asm.h>
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#include <asm/regdef.h>
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/* Maximum number of arguments supported. Must be even! */
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#define O32_ARGC 32
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/* Number of static registers we save. */
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#define O32_STATC 11
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/* Frame size for both of the above. */
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#define O32_FRAMESZ (4 * O32_ARGC + SZREG * O32_STATC)
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.text
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/*
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* O32 function call dispatcher, for interfacing 32-bit ROM routines.
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*
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* The standard 64 (N32) calling sequence is supported, with a0
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* holding a function pointer, a1-a7 -- its first seven arguments
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* and the stack -- remaining ones (up to O32_ARGC, including a1-a7).
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* Static registers, gp and fp are preserved, v0 holds a result.
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* This code relies on the called o32 function for sp and ra
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* restoration and thus both this dispatcher and the current stack
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* have to be placed in a KSEGx (or KUSEG) address space. Any
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* pointers passed have to point to addresses within one of these
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* spaces as well.
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*/
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NESTED(call_o32, O32_FRAMESZ, ra)
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REG_SUBU sp,O32_FRAMESZ
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REG_S ra,O32_FRAMESZ-1*SZREG(sp)
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REG_S fp,O32_FRAMESZ-2*SZREG(sp)
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REG_S gp,O32_FRAMESZ-3*SZREG(sp)
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REG_S s7,O32_FRAMESZ-4*SZREG(sp)
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REG_S s6,O32_FRAMESZ-5*SZREG(sp)
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REG_S s5,O32_FRAMESZ-6*SZREG(sp)
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REG_S s4,O32_FRAMESZ-7*SZREG(sp)
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REG_S s3,O32_FRAMESZ-8*SZREG(sp)
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REG_S s2,O32_FRAMESZ-9*SZREG(sp)
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REG_S s1,O32_FRAMESZ-10*SZREG(sp)
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REG_S s0,O32_FRAMESZ-11*SZREG(sp)
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move jp,a0
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sll a0,a1,zero
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sll a1,a2,zero
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sll a2,a3,zero
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sll a3,a4,zero
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sw a5,0x10(sp)
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sw a6,0x14(sp)
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sw a7,0x18(sp)
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PTR_LA t0,O32_FRAMESZ(sp)
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PTR_LA t1,0x1c(sp)
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li t2,O32_ARGC-7
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1:
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lw t3,(t0)
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REG_ADDU t0,SZREG
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sw t3,(t1)
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REG_SUBU t2,1
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REG_ADDU t1,4
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bnez t2,1b
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jalr jp
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REG_L s0,O32_FRAMESZ-11*SZREG(sp)
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REG_L s1,O32_FRAMESZ-10*SZREG(sp)
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REG_L s2,O32_FRAMESZ-9*SZREG(sp)
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REG_L s3,O32_FRAMESZ-8*SZREG(sp)
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REG_L s4,O32_FRAMESZ-7*SZREG(sp)
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REG_L s5,O32_FRAMESZ-6*SZREG(sp)
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REG_L s6,O32_FRAMESZ-5*SZREG(sp)
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REG_L s7,O32_FRAMESZ-4*SZREG(sp)
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REG_L gp,O32_FRAMESZ-3*SZREG(sp)
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REG_L fp,O32_FRAMESZ-2*SZREG(sp)
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REG_L ra,O32_FRAMESZ-1*SZREG(sp)
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REG_ADDU sp,O32_FRAMESZ
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jr ra
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END(call_o32)
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