forked from luck/tmp_suning_uos_patched
8ae06d223f
Colin King reported a strange oops in S4 resume code path (see below). The test system has i5/i7 CPU. The kernel doesn't open PAE, so 4M page table is used. The oops always happen a virtual address 0xc03ff000, which is mapped to the last 4k of first 4M memory. Doing a global tlb flush fixes the issue. EIP: 0060:[<c0493a01>] EFLAGS: 00010086 CPU: 0 EIP is at copy_loop+0xe/0x15 EAX: 36aeb000 EBX: 00000000 ECX: 00000400 EDX: f55ad46c ESI: 0f800000 EDI: c03ff000 EBP: f67fbec4 ESP: f67fbea8 DS: 007b ES: 007b FS: 00d8 GS: 00e0 SS: 0068 ... ... CR2: 00000000c03ff000 Tested-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Shaohua Li <shaohua.li@intel.com> LKML-Reference: <20100305005932.GA22675@sli10-desk.sh.intel.com> Acked-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: H. Peter Anvin <hpa@zytor.com> Cc: <stable@kernel.org>
81 lines
1.6 KiB
ArmAsm
81 lines
1.6 KiB
ArmAsm
/*
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* This may not use any stack, nor any variable that is not "NoSave":
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*
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* Its rewriting one kernel image with another. What is stack in "old"
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* image could very well be data page in "new" image, and overwriting
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* your own stack under you is bad idea.
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*/
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#include <linux/linkage.h>
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#include <asm/segment.h>
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#include <asm/page_types.h>
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#include <asm/asm-offsets.h>
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#include <asm/processor-flags.h>
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.text
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ENTRY(swsusp_arch_suspend)
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movl %esp, saved_context_esp
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movl %ebx, saved_context_ebx
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movl %ebp, saved_context_ebp
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movl %esi, saved_context_esi
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movl %edi, saved_context_edi
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pushfl
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popl saved_context_eflags
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call swsusp_save
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ret
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ENTRY(restore_image)
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movl mmu_cr4_features, %ecx
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movl resume_pg_dir, %eax
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subl $__PAGE_OFFSET, %eax
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movl %eax, %cr3
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jecxz 1f # cr4 Pentium and higher, skip if zero
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andl $~(X86_CR4_PGE), %ecx
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movl %ecx, %cr4; # turn off PGE
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movl %cr3, %eax; # flush TLB
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movl %eax, %cr3
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1:
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movl restore_pblist, %edx
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.p2align 4,,7
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copy_loop:
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testl %edx, %edx
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jz done
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movl pbe_address(%edx), %esi
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movl pbe_orig_address(%edx), %edi
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movl $1024, %ecx
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rep
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movsl
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movl pbe_next(%edx), %edx
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jmp copy_loop
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.p2align 4,,7
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done:
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/* go back to the original page tables */
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movl $swapper_pg_dir, %eax
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subl $__PAGE_OFFSET, %eax
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movl %eax, %cr3
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movl mmu_cr4_features, %ecx
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jecxz 1f # cr4 Pentium and higher, skip if zero
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movl %ecx, %cr4; # turn PGE back on
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1:
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movl saved_context_esp, %esp
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movl saved_context_ebp, %ebp
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movl saved_context_ebx, %ebx
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movl saved_context_esi, %esi
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movl saved_context_edi, %edi
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pushl saved_context_eflags
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popfl
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xorl %eax, %eax
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ret
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