forked from luck/tmp_suning_uos_patched
c807dbedb5
There is a case where NULL can be a valid return value for ti_clk_get_reg_addr, specifically the case where both the provider index and register offsets are zero. In this case, the current error checking against a NULL pointer will fail. Thus, change the API to return a ERR_PTR value in an error case, and change all the users of this API to check against IS_ERR instead. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Michael Turquette <mturquette@linaro.org>
187 lines
5.1 KiB
C
187 lines
5.1 KiB
C
/*
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* OMAP interface clock support
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*
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* Copyright (C) 2013 Texas Instruments, Inc.
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*
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* Tero Kristo <t-kristo@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk-provider.h>
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#include <linux/slab.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/clk/ti.h>
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#include "clock.h"
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#undef pr_fmt
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#define pr_fmt(fmt) "%s: " fmt, __func__
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static const struct clk_ops ti_interface_clk_ops = {
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.init = &omap2_init_clk_clkdm,
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.enable = &omap2_dflt_clk_enable,
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.disable = &omap2_dflt_clk_disable,
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.is_enabled = &omap2_dflt_clk_is_enabled,
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};
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static struct clk *_register_interface(struct device *dev, const char *name,
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const char *parent_name,
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void __iomem *reg, u8 bit_idx,
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const struct clk_hw_omap_ops *ops)
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{
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struct clk_init_data init = { NULL };
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struct clk_hw_omap *clk_hw;
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struct clk *clk;
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clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL);
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if (!clk_hw)
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return ERR_PTR(-ENOMEM);
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clk_hw->hw.init = &init;
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clk_hw->ops = ops;
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clk_hw->flags = MEMMAP_ADDRESSING;
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clk_hw->enable_reg = reg;
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clk_hw->enable_bit = bit_idx;
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init.name = name;
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init.ops = &ti_interface_clk_ops;
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init.flags = 0;
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init.num_parents = 1;
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init.parent_names = &parent_name;
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clk = clk_register(NULL, &clk_hw->hw);
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if (IS_ERR(clk))
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kfree(clk_hw);
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else
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omap2_init_clk_hw_omap_clocks(clk);
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return clk;
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}
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#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
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struct clk *ti_clk_register_interface(struct ti_clk *setup)
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{
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const struct clk_hw_omap_ops *ops = &clkhwops_iclk_wait;
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u32 reg;
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struct clk_omap_reg *reg_setup;
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struct ti_clk_gate *gate;
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gate = setup->data;
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reg_setup = (struct clk_omap_reg *)®
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reg_setup->index = gate->module;
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reg_setup->offset = gate->reg;
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if (gate->flags & CLKF_NO_WAIT)
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ops = &clkhwops_iclk;
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if (gate->flags & CLKF_HSOTGUSB)
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ops = &clkhwops_omap3430es2_iclk_hsotgusb_wait;
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if (gate->flags & CLKF_DSS)
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ops = &clkhwops_omap3430es2_iclk_dss_usbhost_wait;
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if (gate->flags & CLKF_SSI)
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ops = &clkhwops_omap3430es2_iclk_ssi_wait;
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if (gate->flags & CLKF_AM35XX)
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ops = &clkhwops_am35xx_ipss_wait;
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return _register_interface(NULL, setup->name, gate->parent,
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(void __iomem *)reg, gate->bit_shift, ops);
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}
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#endif
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static void __init _of_ti_interface_clk_setup(struct device_node *node,
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const struct clk_hw_omap_ops *ops)
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{
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struct clk *clk;
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const char *parent_name;
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void __iomem *reg;
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u8 enable_bit = 0;
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u32 val;
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reg = ti_clk_get_reg_addr(node, 0);
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if (IS_ERR(reg))
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return;
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if (!of_property_read_u32(node, "ti,bit-shift", &val))
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enable_bit = val;
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parent_name = of_clk_get_parent_name(node, 0);
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if (!parent_name) {
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pr_err("%s must have a parent\n", node->name);
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return;
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}
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clk = _register_interface(NULL, node->name, parent_name, reg,
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enable_bit, ops);
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if (!IS_ERR(clk))
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of_clk_add_provider(node, of_clk_src_simple_get, clk);
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}
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static void __init of_ti_interface_clk_setup(struct device_node *node)
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{
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_of_ti_interface_clk_setup(node, &clkhwops_iclk_wait);
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}
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CLK_OF_DECLARE(ti_interface_clk, "ti,omap3-interface-clock",
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of_ti_interface_clk_setup);
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static void __init of_ti_no_wait_interface_clk_setup(struct device_node *node)
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{
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_of_ti_interface_clk_setup(node, &clkhwops_iclk);
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}
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CLK_OF_DECLARE(ti_no_wait_interface_clk, "ti,omap3-no-wait-interface-clock",
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of_ti_no_wait_interface_clk_setup);
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#ifdef CONFIG_ARCH_OMAP3
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static void __init of_ti_hsotgusb_interface_clk_setup(struct device_node *node)
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{
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_of_ti_interface_clk_setup(node,
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&clkhwops_omap3430es2_iclk_hsotgusb_wait);
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}
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CLK_OF_DECLARE(ti_hsotgusb_interface_clk, "ti,omap3-hsotgusb-interface-clock",
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of_ti_hsotgusb_interface_clk_setup);
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static void __init of_ti_dss_interface_clk_setup(struct device_node *node)
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{
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_of_ti_interface_clk_setup(node,
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&clkhwops_omap3430es2_iclk_dss_usbhost_wait);
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}
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CLK_OF_DECLARE(ti_dss_interface_clk, "ti,omap3-dss-interface-clock",
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of_ti_dss_interface_clk_setup);
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static void __init of_ti_ssi_interface_clk_setup(struct device_node *node)
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{
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_of_ti_interface_clk_setup(node, &clkhwops_omap3430es2_iclk_ssi_wait);
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}
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CLK_OF_DECLARE(ti_ssi_interface_clk, "ti,omap3-ssi-interface-clock",
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of_ti_ssi_interface_clk_setup);
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static void __init of_ti_am35xx_interface_clk_setup(struct device_node *node)
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{
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_of_ti_interface_clk_setup(node, &clkhwops_am35xx_ipss_wait);
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}
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CLK_OF_DECLARE(ti_am35xx_interface_clk, "ti,am35xx-interface-clock",
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of_ti_am35xx_interface_clk_setup);
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#endif
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#ifdef CONFIG_SOC_OMAP2430
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static void __init of_ti_omap2430_interface_clk_setup(struct device_node *node)
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{
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_of_ti_interface_clk_setup(node, &clkhwops_omap2430_i2chs_wait);
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}
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CLK_OF_DECLARE(ti_omap2430_interface_clk, "ti,omap2430-interface-clock",
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of_ti_omap2430_interface_clk_setup);
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#endif
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