forked from luck/tmp_suning_uos_patched
13f35ac14c
The iSMT (Intel SMBus Message Transport) supports multi-master I2C/SMBus, as well as IPMI. It's operation is DMA-based and utilizes descriptors to initiate transactions on the bus. The iSMT hardware can act as both a master and a target, although this driver only supports being a master. Signed-off-by: Neil Horman <nhorman@tuxdriver.com> Signed-off-by: Bill Brown <bill.e.brown@intel.com> Tested-by: Seth Heasley <seth.heasley@intel.com> Reviewed-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Wolfram Sang <wolfram@the-dreams.de>
37 lines
972 B
Plaintext
37 lines
972 B
Plaintext
Kernel driver i2c-ismt
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Supported adapters:
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* Intel S12xx series SOCs
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Authors:
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Bill Brown <bill.e.brown@intel.com>
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Module Parameters
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-----------------
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* bus_speed (unsigned int)
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Allows changing of the bus speed. Normally, the bus speed is set by the BIOS
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and never needs to be changed. However, some SMBus analyzers are too slow for
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monitoring the bus during debug, thus the need for this module parameter.
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Specify the bus speed in kHz.
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Available bus frequency settings:
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0 no change
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80 kHz
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100 kHz
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400 kHz
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1000 kHz
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Description
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-----------
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The S12xx series of SOCs have a pair of integrated SMBus 2.0 controllers
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targeted primarily at the microserver and storage markets.
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The S12xx series contain a pair of PCI functions. An output of lspci will show
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something similar to the following:
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00:13.0 System peripheral: Intel Corporation Centerton SMBus 2.0 Controller 0
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00:13.1 System peripheral: Intel Corporation Centerton SMBus 2.0 Controller 1
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