kernel_optimize_test/arch
Ralf Baechle 8d9df29db2 MIPS: Sibyte: Apply M3 workaround only on affected chip types and versions.
Previously it was unconditionally used on all Sibyte family SOCs.  The
M3 bug has to be handled in the TLB exception handler which is extremly
performance sensitive, so this modification is expected to deliver around
2-3% performance improvment.  This is important as required changes to the
M3 workaround will make it more costly.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12 17:26:19 +01:00
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alpha
arm
avr32
blackfin
cris
frv
h8300
ia64
m32r
m68k
m68knommu
microblaze
mips MIPS: Sibyte: Apply M3 workaround only on affected chip types and versions. 2010-04-12 17:26:19 +01:00
mn10300
parisc
powerpc
s390
score
sh
sparc
um
x86
xtensa
.gitignore
Kconfig